MC68HC908AP16CFB datasheet(77/440 Pages) MOTOROLA

77 / 440 page

Central Processor Unit (CPU)

CPU Registers

MC68HC908AP Family — Rev. 2.5

Data Sheet

MOTOROLA

6.3.5 Condition Code Register

The 8-bit condition code register contains the interrupt mask and five

flags that indicate the results of the instruction just executed. Bits 6 and

5 are set permanently to logic 1. The following paragraphs describe the

functions of the condition code register.

V — Overflow Flag

The CPU sets the overflow flag when a two's complement overflow

occurs. The signed branch instructions BGT, BGE, BLE, and BLT use

the overflow flag.

1 = Overflow

0 = No overflow

H — Half-Carry Flag

The CPU sets the half-carry flag when a carry occurs between

accumulator bits 3 and 4 during an add-without-carry (ADD) or add-

with-carry (ADC) operation. The half-carry flag is required for binary-

coded decimal (BCD) arithmetic operations. The DAA instruction

uses the states of the H and C flags to determine the appropriate

correction factor.

1 = Carry between bits 3 and 4

0 = No carry between bits 3 and 4

Bit 7

654321

Bit 0

Read:

Write:

Reset:

XXX

X = Indeterminate

Figure 6-6. Condition Code Register (CCR)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908AP16CFB Datasheet(PDF) 77 Page - Motorola, Inc