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MC68HC908AP16CFB Datasheet(PDF) 49 Page - Motorola, Inc |
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MC68HC908AP16CFB Datasheet(HTML) 49 Page - Motorola, Inc |
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49 / 440 page ![]() Memory Map Input/Output (I/O) Section MC68HC908AP Family — Rev. 2.5 Data Sheet MOTOROLA 49 $FE0D Break Address Register Low (BRKL) Read: Bit 7 654321 Bit 0 Write: Reset: 00000000 $FE0E Break Status and Control Register (BRKSCR) Reset: BRKE BRKA 000000 Read: Write: 00000000 $FE0F LVI Status Register (LVISR) Reset: LVIOUT 0 000000 Read: Write: 00000000 $FFCF Mask Option Register (MOR)# Read: OSCSEL1 OSCSEL0 RRRRRR Write: Erased: 11111111 Reset: UUUUUUUU $FFFF COP Control Register (COPCTL) Read: Low byte of reset vector Write: Writing clears COP counter (any value) Reset: Unaffected by reset # MOR is a non-volatile FLASH register; write by programming. Addr. Register Name Bit 7 654321 Bit 0 U = Unaffected X = Indeterminate = Unimplemented R = Reserved Figure 2-2. Control, Status, and Data Registers (Sheet 12 of 12) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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