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MC68HC908AP16CFB Datasheet(PDF) 4 Page - Motorola, Inc |
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MC68HC908AP16CFB Datasheet(HTML) 4 Page - Motorola, Inc |
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4 / 440 page ![]() Revision History Data Sheet MC68HC908AP Family — Rev. 2.5 4 MOTOROLA Revision History Date Revision Level Description Page Number(s) October 2003 2.5 Added MC68HC908AP16/AP8 information throughout. — Section 10. Monitor ROM (MON) — Corrected RAM address to $60. 167 Section 24. Electrical Specifications — Added run and wait IDD data for 8MHz at 3V. 421 August 2003 2.4 Section 24. Electrical Specifications — Updated stop IDD data. 417, 421 July 2003 2.3 Removed MC68HC908AP16 references throughout. — Table 1-2 . Pin Functions — Added footnote for VREG. 30 5.3 Configuration Register 1 (CONFIG1) — Clarified LVIPWRD and LVIREGD bits. 67 Section 8. Clock Generator Module (CGM), 8.7.2 Stop Mode — Updated BSC bit behavior. 125 10.5 ROM-Resident Routines — Corrected data size limits and control byte size for EE_READ and EE_WRITE. 168–193 Figure 12-2 . Timebase Control Register (TBCR) — Corrected register address. 207 Section 24. Electrical Specifications — Updated. 415 May 2003 2.2 Updated for fNOM = 125kHz and filter components in CGM section. 101 Updated electricals. 415 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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