MC68HC908AP16CFB datasheet(80/440 Pages) MOTOROLA

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Central Processor Unit (CPU)

Data Sheet

MC68HC908AP Family — Rev. 2.5

MOTOROLA

6.5.2 Stop Mode

The STOP instruction:

•

Clears the interrupt mask (I bit) in the condition code register,

enabling external interrupts. After exit from stop mode by external

interrupt, the I bit remains clear. After exit by reset, the I bit is set.

•

Disables the CPU clock.

After exiting stop mode, the CPU clock begins running after the oscillator

stabilization delay.

6.6 CPU During Break Interrupts

If the break module is enabled, a break interrupt causes the CPU to

execute the software interrupt instruction (SWI) at the completion of the

current CPU instruction. (See Section 23. Break Module (BRK).) The

program counter vectors to $FFFC–$FFFD ($FEFC–$FEFD in monitor

mode).

A return-from-interrupt instruction (RTI) in the break routine ends the

break interrupt and returns the MCU to normal operation if the break

interrupt has been deasserted.

6.7 Instruction Set Summary

Table 6-1 provides a summary of the M68HC08 instruction set.

6.8 Opcode Map

The opcode map is provided in Table 6-2.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908AP16CFB Datasheet(PDF) 80 Page - Motorola, Inc