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MC68HC908AP16CFB Datasheet(PDF) 57 Page - Motorola, Inc |
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MC68HC908AP16CFB Datasheet(HTML) 57 Page - Motorola, Inc |
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57 / 440 page ![]() FLASH Memory FLASH Control Register MC68HC908AP Family — Rev. 2.5 Data Sheet MOTOROLA 57 4.3 FLASH Control Register The FLASH control register (FLCR) controls FLASH program and erase operation. HVEN — High Voltage Enable Bit This read/write bit enables the charge pump to drive high voltages for program and erase operations in the array. HVEN can only be set if either PGM = 1 or ERASE = 1 and the proper sequence for program or erase is followed. 1 = High voltage enabled to array and charge pump on 0 = High voltage disabled to array and charge pump off MASS — Mass Erase Control Bit This read/write bit configures the memory for mass erase operation or page erase operation when the ERASE bit is set. 1 = Mass erase operation selected 0 = Page erase operation selected ERASE — Erase Control Bit This read/write bit configures the memory for erase operation. ERASE is interlocked with the PGM bit such that both bits cannot be equal to 1 or set to 1 at the same time. 1 = Erase operation selected 0 = Erase operation not selected PGM — Program Control Bit This read/write bit configures the memory for program operation. PGM is interlocked with the ERASE bit such that both bits cannot be equal to 1 or set to 1 at the same time. 1 = Program operation selected 0 = Program operation not selected Address: $FE08 Bit 7 654321 Bit 0 Read: 0000 HVEN MASS ERASE PGM Write: Reset: 00000000 Figure 4-2. FLASH Control Register (FLCR) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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