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MC68HC908AP16CFB Datasheet(PDF) 47 Page - Motorola, Inc |
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MC68HC908AP16CFB Datasheet(HTML) 47 Page - Motorola, Inc |
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47 / 440 page ![]() Memory Map Input/Output (I/O) Section MC68HC908AP Family — Rev. 2.5 Data Sheet MOTOROLA 47 $005A ADC Data Register Low 0 (ADRL0) Read: ADx ADx ADx ADx ADx ADx ADx ADx Write: RRRRRRRR Reset: 00000000 $005B ADC Data Register Low 1 (ADRL1) Read: AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 Write: RRRRRRRR Reset: 00000000 $005C ADC Data Register Low 2 (ADRL2) Read: AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 Write: RRRRRRRR Reset: 00000000 $005D ADC Data Register Low 3 (ADRL3) Read: AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 Write: RRRRRRRR Reset: 00000000 $005E ADC Auto-scan Control Register (ADASCR) Read: AUTO1 AUTO0 ASCAN Write: Reset: 00000000 $005F Unimplemented Read: Write: Reset: $FE00 SIM Break Status Register (SBSR) Read: RRRRRR SBSW R Write: Note Reset: 0 Note: Writing a logic 0 clears SBSW. $FE01 SIM Reset Status Register (SRSR) Read: POR PIN COP ILOP ILAD MODRST LVI 0 Write: Reset: 10000000 $FE02 Reserved Read: RRRRRRRR Write: Reset: Addr. Register Name Bit 7 654321 Bit 0 U = Unaffected X = Indeterminate = Unimplemented R = Reserved Figure 2-2. Control, Status, and Data Registers (Sheet 10 of 12) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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