PDP83TG720SWCSTQ1 datasheet(106/199 Pages) TI

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7.6.2.50 SYMB_POL_CFG Register (Address = 0x55B) [reset = 0x0]

SYMB_POL_CFG is shown in Table 7-73.

Return to the Summary Table.

Table 7-73. SYMB_POL_CFG Register Field Descriptions

Bit

Field

Type

Reset

Description

15-5

RESERVED

11b0000000

0000

Reserved

cfg_slave_auto_pol_corre

ction_en

R/W

1b0

Correct tx polarity for slave based on received polarity

1b0 = Slave tx polarity independent of slave rx polarity

1b1 = Slave tx polarity to match received polarity

cfg_rx_symb_order_inv

R/W

1b0

Order of received symbols S0 to S6 reversed to S6 to S0 Valid only if

LP's 0x55B[1] is set (TI-TI link)

1b0 = Order of received symbols S0 to S6 unchanged

1b1 = Order of received symbols S0 to S6 reversed to S6 to S0

cfg_rx_symb_pol_inv

R/W

1b0

Invert polarity of received symbols

1b0 = Unchanged polarity of received symbols

1b1 = Invert polarity of received symbols

cfg_tx_symb_order_inv

R/W

1b0

Order of transmit symbols S0 to S6 reversed to S6 to S0 Valid only if

LP's 0x55B[3] is set (TI-TI link)

1b0 = Order of transmit symbols S0 to S6 unchanged

1b1 = Order of transmit symbols S0 to S6 reversed to S6 to S0

cfg_tx_symb_pol_inv

R/W

1b0

Invert polarity of transmit symbols

1b0 = Unchanged polarity of transmit symbols

1b1 = Invert polarity of transmit symbols

DP83TG720S-Q1

SNLS604 – SEPTEMBER 2020

www.ti.com

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PDP83TG720SWCSTQ1 Datasheet(PDF) 106 Page - Texas Instruments

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