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PAC1941T-1E/4MX. Datasheet(PDF) 18 Page - Microchip Technology |
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PAC1941T-1E/4MX. Datasheet(HTML) 18 Page - Microchip Technology |
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18 / 96 page ![]() PAC194X DS20006543A-page 18 2021 Microchip Technology Inc. 3.1 SENSE[N]+/- (N = 1, 2, 3, 4) These two pins form the differential input for measuring voltage across a sense resistor in the application. The positive input (SENSE[N]+) also acts as the input pin for bus voltage. 3.2 Ground (GND) System ground. 3.3 SMBus Data (SM_DATA) This is the bidirectional SMBus data pin. This pin is open-drain and requires a pull-up resistor to VDD. 3.4 SMBus Clock (SM_CLK) This is the SMBus clock input pin and requires an external pull-up resistor, except if used in High-Speed mode, which requires a CMOS driver from the host. 3.5 Positive Power Supply Voltage (VDD) Power supply input pin for the device. 2.7V-5.5V range, bypass with 100 nF ceramic capacitor to ground near the IC. 3.6 Address Selection (ADDRSEL) Connect a resistor from this pin to ground to select the SMBus address. TABLE 3-2: PAC194X-2 PIN FUNCTION TABLE VQFN WLCSP Symbol Pin Type Description 1 C3 SLOW/ALERT1 Digital I/O Pin Default: SLOW input pin. When high, all channels sample at 8 SPS. The pin may be programmed to function as the ALERT1 pin or GPIO (open-drain). 2A4 VDD Power for IC Positive power supply voltage. 3 B4 GND Ground Pin Ground for the IC. 4 C4 SCL SMBus Clock Input Clock Input pin requires a pull-up resistor VDD voltage for the digital controller. 5 D4 SDA SMBus Data I/O Open-drain requires a pull-up resistor VDD voltage for the digital controller. 6 C2 ADDRSEL Analog I/O Pin Address selection for the SMBus client address. 7C1(2) VBUS2-(1) Analog Input Pin 0-FSR, connect to the ground sense point for VBUS2. 8D1(2) VBUS2+(1) Analog Input Pin 0-FSR, connect to VBUS2+. 9D2(2) SENSE2-(1) Analog Input Pin 0-FSR, connect to the low side of the sense resistor. 10 D3(2) SENSE2+(1) Analog Input Pin 0-FSR, connect to the low side of the sense resistor. 11 A3 SENSE1+ Analog Input Pin 0-FSR, connect to the low side of the sense resistor. 12 A2 SENSE1- Analog Input Pin 0-FSR, connect to the low side of the sense resistor. 13 A1 VBUS1+ Analog Input Pin 0-FSR, connect to VBUS1+. 14 B1 VBUS1- Analog Input Pin 0-FSR, connect to the ground sense point for VBUS1. 15 B2 GPIO/ALERT2 Digital I/O Pin Default: GPIO, Input mode. May be programmed to be the ALERT2 pin indicator (open-drain) or the GPIO function (open-drain). 16 B3 PWRDN Digital Input Pin Active-low puts the device in a Power-Down state (all circuitry is powered down, including SMBus). 17 — EP N/C The Exposed Pad is not electrically connected. Note 1: VQFN Package: for PAC1941-2, pins 7, 8, 9 and 10 are not connected inside and must be grounded. 2: WLCSP: for PAC1942-2, pins C1, D1, D2 and D3 are inactive and must be grounded 3: Analog Input pins: for any unused channels, connect the SENSE+ and SENSE- pins to ground. Voltage may be applied to the analog input pins before or after VDD is applied to the device. For the PAC194X-2 devices, the SENSE+ and SENSE- pins have a Common-mode range from 0V to 9V. 4: For the analog input pins, the safe operating voltage range is up to 9V. |
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