PAC1941T-1ESLASH4MX. datasheet(28/96 Pages) MICROCHIP

28 / 96 page

PAC194X

DS20006543A-page 28

 2021 Microchip Technology Inc.

5.13

Power and Energy

The PAC194X has a 56-bit accumulator and a 32-bit

accumulator counter:

• 56 bits for accumulator

• 32 bits for accumulator count

• 30 bits for the power realized by multiplication of

the 17-bit current number and a 14-bit voltage

number

The FSR for power depends on the external sense

resistor used, as shown in Equation 5-5.

EQUATION 5-5:

POWER FSR

CALCULATION

The device implements power measurements by

multiplying VBUS and VSENSE to give a VPOWER result.

VPOWER values are used to calculate the proportional

power, as shown in Equation 5-6. The proportional

power is the fractional portion of the FSR power mea-

sured in one sample.

EQUATION 5-6:

PROPORTIONAL POWER

CALCULATION

To calculate the actual power from the proportional

power, multiply by the FSR power, as shown in

Equation 5-7. This actual power number is the power

measured in one sample.

EQUATION 5-7:

POWER CALCULATION

These VPOWER results are digitally accumulated on

chip and stored in the VACCN registers.

The energy calculation in Equation 5-8 and 5-9 uses a

different denominator term depending on the Unipolar

or Bipolar mode. Bipolar mode for energy applies

when the Bipolar/Bidirectional mode is used for VBUS

and/or VSENSE. Equation 5-8 shows how to realize this

using the accumulator results, accumulator count and

the accumulation period, T. In this equation, T must be

known from a system clock time stamp or other

accurate indicator of the total accumulation period.

EQUATION 5-8:

ENERGY CALCULATION

EQUATION 5-9:

ENERGY CALCULATION

Equation 5-9 shows how to calculate energy using the

accumulated power and the sampling rate, fs.

5.13.1

ADAPTIVE ACCUMULATOR

The PAC194X has a feature called Adaptive

Accumulator mode. In this mode, sampling is pro-

grammed at one of the valid sample rates and sam-

ples are accumulated. If the SLOW pin is asserted and

the device begins sampling at 8 SPS, these samples

are shifted by 7 bits to the left and accumulated so as

to simulate sampling at the maximum sampling rate,

1024 SPS, and the accumulator count is also incre-

mented by 128 for each sample in Slow mode (when

using the Adaptive Accumulator mode) to simulate

samples being accumulated at the maximum sampling

rate.

This offers a big reduction in host overhead and bus

traffic for systems that need to use the SLOW pin for

lower power operation during certain times and want

to have continuous accurate energy monitoring for

both the maximum sampling rate and the SLOW

sampling rate.

PowerFSR

100 mV RSENSE



 9V



Where:

RSENSE = External RSENSE resistor value

100 mV = Full-scale VSENSE voltage input

9V = Full-scale VBUS voltage input

PowerFSR

0.9V

 RSENSE



PPROP

VPOWER

Denominator

-----------------------------------

Where:

Denominator =230 (Unipolar mode)

=230 (FSR/2 mode)

=229 (Bipolar mode)

PACTUAL

PowerFSR PPROP



Energy

VACCN

Denominator

-----------------------------------

PwrFSR



AccCount

--------------------------



Where:

Denominator =230 (Unipolar mode)

=230 (FSR/2 mode)

=229 (Bipolar mode)

Energy

VACCN

Denominator

-----------------------------------

PwrFSR



--------------------------



Where:

Denominator =230 (Unipolar mode)

=230 (FSR/2 mode)

=229 (Bipolar mode)

PAC1941T-1E/4MX. Datasheet(PDF) 28 Page - Microchip Technology

PAC1941T-1E/4MX. Datasheet(HTML) 28 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96

Datasheet Download

Link URL