LSM6DSV320X datasheet(106/212 Pages) STMICROELECTRONICS

106 / 212 page

9.71

EMB_FUNC_CFG (63h)

Embedded functions configuration register (R/W)

Table 189. EMB_FUNC_CFG register

HG_USR_OFF_ON_

EMB_FUNC

EMB_FUNC_IRQ_

MASK_XL_HG_SETTL

EMB_FUNC_IRQ_

MASK_G_SETTL

EMB_FUNC_IRQ_

MASK_XL_SETTL

EMB_FUNC_

DISABLE

0(1)

1. This bit must be set to 0 for the correct operation of the device.

Table 190. EMB_FUNC_CFG register description

HG_USR_OFF_ON_EMB_FUNC

Drives the high-g accelerometer data with user offset correction to the embedded functions

EMB_FUNC_IRQ_MASK_XL_HG_SETTL

Enables / masks the execution trigger of the embedded functions when the high-g

accelerometer data are settling. Default value: 0

(0: disabled;

1: masks the execution trigger of the embedded functions until the high-g accelerometer filter

settling ends)

Note: Refer to the product application note for the details regarding operating/power mode

configurations, settings, turn-on/off time, and on-the-fly changes.

EMB_FUNC_IRQ_MASK_G_SETTL

Enables / masks the execution trigger of the embedded functions when the gyroscope data are

settling. Default value: 0

(0: disabled;

1: masks the execution trigger of the embedded functions until the gyroscope filter settling ends)

Note: Refer to the product application note for the details regarding operating/power mode

configurations, settings, turn-on/off time, and on-the-fly changes.

EMB_FUNC_IRQ_MASK_XL_SETTL

Enables / masks the execution trigger of the embedded functions when the low-g accelerometer

data are settling. Default value: 0

(0: disabled;

1: masks the execution trigger of the embedded functions until the low-g accelerometer filter

settling ends)

Note: Refer to the product application note for the details regarding operating/power mode

configurations, settings, turn-on/off time, and on-the-fly changes.

EMB_FUNC_DISABLE

Disables execution of the embedded functions. Default value: 0

(0: execution of the embedded functions is enabled;

1: execution trigger of the embedded functions is not generated anymore and all initialization

procedures are forced when this bit is set back to 0).

9.72

UI_HANDSHAKE_CTRL (64h)

Control register (UI side) for UI / IF2 shared registers (R/W)

Table 191. UI_HANDSHAKE_CTRL register

0(1)

UI_SHARED

_ACK

UI_SHARED

_REQ

1. This bit must be set to 0 for the correct operation of the device.

Table 192. UI_HANDSHAKE_CTRL register description

UI_SHARED_ACK

Primary interface side. This bit acknowledges the handshake. If the secondary interface is not accessing

the shared registers, this bit is set to 1 by the device and the R/W operation on the UI_IF2_SHARED_0

(65h) through UI_IF2_SHARED_5 (6Ah) registers is allowed on the primary interface.

UI_SHARED_REQ

This bit is used by the primary interface controller to request access to the UI_IF2_SHARED_0 (65h)

through UI_IF2_SHARED_5 (6Ah) registers. When the R/W operation is finished, the controller must

reset this bit.

LSM6DSV320X

DS14623 - Rev 1

page 106/212

LSM6DSV320X Datasheet(PDF) 106 Page - STMicroelectronics

LSM6DSV320X Datasheet(HTML) 106 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL