H8SLASH300H datasheet(34/552 Pages) RENESAS

34 / 552 page

Section 1 Overview

Rev. 3.00 May 15, 2007 Page 2 of 516

REJ09B0152-0300

• Compact package

Package

Code

Body Size

Pin Pitch

Remarks

P-VQFN-32

TNP-32

× 6 mm

0.5 mm

P-LQFP-32

32P6U-A

× 7 mm

0.8 mm

1.2

Internal Block Diagram

Subclock oscillator

H8/300H CPU

System clock oscillator

P10/AEVH/FTIOA/TMOW/CLKOUT

P11/AEVL/FTCI (/

IRQ1)

P12/IRQAEC/AECPWM

Vcc

AVcc

Vss

RES

TEST/

ADTRG

NMI*1

P90/

SCS/SCL

P91/SSCK/SDA

P92/SSO (/

IRQ0)

P93/SSI (/

IRQ1)

OSC1

OSC2

PB0/AN0/

IRQ0

PB1/AN1/

IRQ1

PB2/AN2

PB3/AN3

PB4/AN4/COMP0

PB5/AN5/COMP1

P82/FTIOB

P83/FTIOC

P84/FTIOD

P30/SCK3/VCref (/

IRQ0)

P31/RXD3/IrRXD

P32/TXD3/IrTXD

ROM

Watchdog timer

Timer B1

10-bit A/D converter

Asynchronous

event counter

I2C bus

interface 2 *2

SCI3/IrDA

Notes: 1. The

NMI pin is not available when the E7 or on-chip emulator debugger is used.

2. SSU and IIC2 are shared.

RAM

Power-on reset circuit

Realtime clock

Timer W

Comparators

SSU*2

E7_0

E7_1

E7_2

Figure 1.1 Internal Block Diagram of H8/38602R Group

H8/300H Datasheet(PDF) 34 Page - Renesas Technology Corp

H8/300H Datasheet(HTML) 34 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL