H8SLASH300H datasheet(9/552 Pages) RENESAS

9 / 552 page

Rev. 3.00 May 15, 2007 Page ix of xxxii

Contents

Section 1 Overview................................................................................................1

1.1

Features.................................................................................................................................. 1

1.2

Internal Block Diagram..........................................................................................................2

1.3

Pin Assignment ...................................................................................................................... 3

1.4

Pin Functions ......................................................................................................................... 4

Section 2 CPU........................................................................................................7

2.1

Address Space and Memory Map .......................................................................................... 8

2.2

Register Configuration........................................................................................................... 9

2.2.1

General Registers .................................................................................................... 10

2.2.2

Program Counter (PC) ............................................................................................ 11

2.2.3

Condition-Code Register (CCR)............................................................................. 11

2.3

Data Formats........................................................................................................................ 13

2.3.1

General Register Data Formats ............................................................................... 13

2.3.2

Memory Data Formats ............................................................................................ 15

2.4

Instruction Set ...................................................................................................................... 16

2.4.1

Table of Instructions Classified by Function .......................................................... 16

2.4.2

Basic Instruction Formats ....................................................................................... 26

2.5

Addressing Modes and Effective Address Calculation ........................................................ 27

2.5.1

Addressing Modes .................................................................................................. 27

2.5.2

Effective Address Calculation ................................................................................ 30

2.6

Basic Bus Cycle ................................................................................................................... 32

2.6.1

Access to On-Chip Memory (RAM, ROM)............................................................ 32

2.6.2

On-Chip Peripheral Modules .................................................................................. 33

2.7

CPU States ........................................................................................................................... 34

2.8

Usage Notes ......................................................................................................................... 35

2.8.1

Notes on Data Access to Empty Areas ................................................................... 35

2.8.2

EEPMOV Instruction.............................................................................................. 35

2.8.3

Bit-Manipulation Instruction .................................................................................. 36

Section 3 Exception Handling .............................................................................41

3.1

Exception Sources and Vector Address ............................................................................... 42

3.2

Reset .................................................................................................................................... 44

3.2.1

Reset Exception Handling....................................................................................... 44

3.2.2

Interrupt Immediately after Reset ........................................................................... 45

3.3

Input/Output Pins ................................................................................................................. 46

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