H8SLASH300H datasheet(96/552 Pages) RENESAS

96 / 552 page

Section 4 Clock Pulse Generators

Rev. 3.00 May 15, 2007 Page 64 of 516

REJ09B0152-0300

4.1

• Oscillator control register (OSCCR)

4.1.1

Oscillator Control Register (OSCCR)

OSCCR controls the subclock oscillator, on-chip feedback resistance, and on-chip oscillator.

Bit

Bit Name

Initial

Value

R/W

Description

SUBSTP

R/W

Subclock Oscillator Control

Controls start and stop of the subclock oscillator. When

the subclock is not used, set this bit to 1.

0: Subclock oscillator operates

1: Subclock oscillator stops

RFCUT

R/W

On-chip Feedback Resistance Control

Selects whether the on-chip feedback resistance in the

system clock oscillator is used when an external clock

is input or when the on-chip oscillator is used.

After setting this bit in the state in which an external

clock is input or the on-chip oscillator is used,

temporarily transit to standby mode, watch mode, or

subactive mode. The setting of whether the feedback

resistance in the system clock oscillator is used or not

takes effect when standby mode, watch mode, or

subactive mode is entered.

0: On-chip feedback resistance in system clock

oscillator is used

1: On-chip feedback resistance in system clock

oscillator is not used

SUBSEL

R/W

Subclock Select

Selects by which oscillator the subclock pulse

generator operates.

0: Subclock oscillator operates

1: On-chip oscillator operates

Note: The SUBSEL bit setting can be changed only

when the subclock is not being used.

H8/300H Datasheet(PDF) 96 Page - Renesas Technology Corp

H8/300H Datasheet(HTML) 96 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL