H8SLASH300H datasheet(10/552 Pages) RENESAS

10 / 552 page

Rev. 3.00 May 15, 2007 Page x of xxxii

3.4

Register Descriptions ...........................................................................................................46

3.4.1

Interrupt Edge Select Register (IEGR) ................................................................... 47

3.4.2

Interrupt Enable Register 1 (IENR1) ...................................................................... 48

3.4.3

Interrupt Enable Register 2 (IENR2) ...................................................................... 49

3.4.4

Interrupt Flag Register 1 (IRR1)............................................................................. 50

3.4.5

Interrupt Flag Register 2 (IRR2)............................................................................. 51

3.5

Interrupt Sources.................................................................................................................. 52

3.5.1

External Interrupts .................................................................................................. 52

3.5.2

Internal Interrupts ................................................................................................... 53

3.6

Operation ............................................................................................................................. 53

3.6.1

Interrupt Exception Handling Sequence ................................................................. 56

3.7

Stack Status after Exception Handling................................................................................. 57

3.7.1

Interrupt Response Time......................................................................................... 57

3.8

Usage Notes ......................................................................................................................... 58

3.8.1

Notes on Stack Area Use ........................................................................................ 58

3.8.2

Notes on Switching Functions of External Interrupt Pins....................................... 59

3.8.3

Method for Clearing Interrupt Request Flags ......................................................... 60

3.8.4

Conflict between Interrupt Generation and Disabling ............................................ 60

3.8.5

Instructions that Disable Interrupts ......................................................................... 61

3.8.6

Interrupts during Execution of EEPMOV Instruction ............................................ 61

3.8.7

IENR Clearing ........................................................................................................ 61

Section 4 Clock Pulse Generators ....................................................................... 63

4.1

Register Description ............................................................................................................64

4.1.1

Oscillator Control Register (OSCCR) .................................................................... 64

4.2

System Clock Oscillator ...................................................................................................... 66

4.2.1

Connecting Crystal Resonator ................................................................................ 66

4.2.2

Connecting Ceramic Resonator .............................................................................. 66

4.2.3

External Clock Input Method ................................................................................. 67

4.2.4

On-Chip Oscillator Selection Method .................................................................... 67

4.3

Subclock Oscillator.............................................................................................................. 68

4.3.1

Connecting 32.768-kHz/38.4-kHz Crystal Resonator ............................................ 68

4.3.2

Pin Connection when not Using Subclock.............................................................. 69

4.3.3

External Clock Input Method ................................................................................. 70

4.3.4

On-Chip Oscillator Selection Method .................................................................... 70

4.4

Prescalers ............................................................................................................................. 71

4.4.1

Prescaler S .............................................................................................................. 71

4.4.2

Prescaler W............................................................................................................. 71

4.5

Usage Notes ......................................................................................................................... 72

4.5.1

Note on Resonators and Resonator Circuits ........................................................... 72

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