7643 datasheet(116/424 Pages) RENESAS

116 / 424 page

Rev.2.00

Aug 28, 2006

page 99 of 103

REJ09B0133-0200

OVERVIEW

7643 Group

USB

•When the USB Reset Interrupt Status Flag is kept at “1”, all other

flags in the USB internal registers (addresses 005016 to 005F16)

will return to their reset status. However, the following registers

are not affected by the USB reset: USB control register (address

001316), Frequency synthesizer control register (address

006C16), Clock control register (address 001F16), and USB end-

point-x FIFO register (addresses 006016 to 006216).

•When not using the USB function, set the USB Line Driver Supply

Enable Bit of the USB control register (address 001316) to “1” for

power supply to the internal circuits (at Vcc = 5V).

•The IN_PKT_RDY Bit can be set by software even when using

the AUTO_SET function.

•When writing to USB-related registers, set the USB Clock Enable

Bit to “1”, then perform the write after four

φ cycle waits.

•The receive buffer full interrupt request is not generated if receive

errors are detected at receiving.

•If a character bit length is 7 bits, bit 7 of the UART transmit/re-

ceive buffer register 1 and bits 0 to 7 of the UART transmit/

receive buffer register 2 are ignored at transmitting; they are in-

valid at receiving.

If a character bit length is 8 bits, bits 0 to 7 of the UART transmit/

receive buffer register 2 are ignored at transmitting; they are in-

valid at receiving.

If a character bit length is 9 bits, bits 1 to 7 of the UART transmit/

receive buffer register 2 are ignored at transmitting; they are “0”

at receiving.

•When using the MCU at Vcc = 3.3V, set the USB Line Driver Sup-

ply Enable Bit to “0” (line driver disable). Note that setting the

USB Line Driver Current Control Bit (USBC3) doesn’t affect the

USB operation.

•Read one packet data from the OUT FIFO before clearing the

OUT_PKT_RDY Flag. If the OUT_PKT_RDY Flag is cleared

while one packet data is being read, the internal read pointer can-

not operate normally.

•Use the transfer instructions such as LDA and STA to set the reg-

isters: USB interrupt status registers 1, 2 (addresses 005216,

005316); USB endpoint 0 IN control register (address 005916);

USB endpoint x IN control register (address 005916); USB end-

point x OUT control register (address 005A16). Do not use the

read-modify-write instructions such as the SEB or the CLB in-

struction.

When writing to bits shown by Table 15 using the transfer instruc-

tion such as LDA or STA, a value which never affect its bit state

is required. Take the following sequence to change these bits

contents:

(1) Store the register contents onto a variable or a data register.

(2) Change the target bit on the variable or the data register. Si-

multaneously mask the bit so that its bit state cannot be

changed. (See to Table 15.)

(3) Write the value from the variable or the data register to the

•To use the AUTO_SET function for an IN transfer when the

AUTO_SET bit is set to 1, set the FIFO to single buffer mode.

Table 15 Bits of which state might be changed owing to software write

USB endpoint 0 IN control register

USB endpoint x (x = 1, 2) IN control register

USB endpoint x (x = 1, 2) OUT control register

Bit name

IN_PKT_RDY (b1)

DATA_END (b3)

FORCE_STALL (b4)

IN_PKT_RDY (b0)

OUT_PKT_RDY (b0)

FORCE_STALL (b4)

Value not affecting state (Note)

“0”

“1”

“0”

“1”

Note: Writing this value will not change the bit state, because this value cannot be written to the bit by software.

NOTES ON PROGRAMMING

7643 Datasheet(PDF) 116 Page - Renesas Technology Corp

7643 Datasheet(HTML) 116 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL