| Electronic Components Datasheet Search |
|
7643 Datasheet(PDF) 118 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
7643 Datasheet(HTML) 118 Page - Renesas Technology Corp |
|
118 / 424 page ![]() Rev.2.00 Aug 28, 2006 page 101 of 103 REJ09B0133-0200 OVERVIEW 7643 Group USAGE NOTES Oscillator Connection Notice The built-in feedback register (1 M Ω) and the dumping resistor (400 Ω) is internally connected between pins XIN and XOUT. Power Source Voltage When the power source voltage value of a microcomputer is less than the value which is indicated as the recommended operating conditions, the microcomputer does not operate normally and may perform unstable operation. In a system where the power source voltage drops slowly when the power source voltage drops or the power supply is turned off, reset a microcomputer when the power source voltage is less than the recommended operating conditions and design a system not to cause errors to the system by this unstable operation. Power Supply Pins Treatment Notice Please connect 0.1 µF and 4.7 µF capacitors in parallel between pins Vcc and Vss, and pins AVss and AVcc. These capacitors must be connected as close as possible be- tween the DC supply and GND pins, and also the analog supply pin and corresponding GND pin. Wiring patterns for these supply and GND pins must be wider than other signal patterns. These filter capacitors should not be placed near the LPF pins as they will cause noise problems Reset Pin Treatment Notice (Noise Elimination) If the reset input signal rises very slowly, we recommend attaching a capacitor, such as a 1000 pF ceramic capacitor with excellent high frequency characteristics, between the RESET pin and the Vss pin. Please note the following two issues for this capacitor connection. (1) Capacitor wiring pattern must be as short as possible (within 20 mm). (2) The user must perform an application level operation test. LPF Pin Treatment Notice All passive components must be located as close as possible to the LPF pin. 0.1 µF 680 pF LPF pin AVSS pin 1 k Ω Fig. 94 Passive components near LPF pin •In Vcc = 3.3 V operation, connect the Ext. Cap. pin directly to the Vcc pin in order to supply power to the USB transceiver. In addi- tion, you will need to disable the DC-DC converter in this operation (set bit 4 of the USB control register to “0”.) If you are using the bus powered supply in Vcc = 3.3 V operation, the DC- DC converter must be placed outside the MCU. •In Vcc = 5 V operation, do not connect the external DC-DC con- verter to the Ext. Cap. pin. Use the built-in DC-DC converter by enabling the USB line driver. •Make sure the USB D+/D- lines do not cross any other wires. Keep a large GND area to protect the USB lines. Also, make sure you use a USB specification compliant connecter for the connec- tion. XIN enable lock FSE LS USBC5 enable USB Clock (48 MHz) USB FCU enable USBC7 USB transceiver enable USBC7 DC-DC converter enable USBC4 current mode USBC3 Ext. Cap. D+ D- Frequency Synthesizer Note 1 Notes 1: In Vcc = 3.3 V, connect to Vcc. In Vcc =5 V, do not connect the external DC-DC converter to the Ext. Cap pin. 2: The resistors values depend on the layout of the printed circuit board. Note 2 Fig.95 Peripheral circuit AVss and AVcc Pin Treatment Notice (Noise Elimination) An insulation connector (Ferrite Beads) must be connected be- tween AVss and Vss pins and between AVcc and Vcc pins. USB Transceiver Treatment (Noise Elimination) •The Full-Speed USB2.0 specification requires a driver -imped- ance 28 to 44 Ω. (Refer to Clause 7.1.1.1 Full-speed (12 Mb/s) Driver Characteristics in the USB specification.) In order to meet the USB specification impedance requirements, connect a resis- tor (27 Ω to 33 Ω recommended) in series to the USB D+ pin and the USB D- pin. In addition, in order to reduce the ringing and control the falling/ rising timing of USB D+/D- and a crossover point, connect a ca- pacitor between the USB D+/D- pins and the Vss pin if necessary. The values and structure of those peripheral elements depend on the impedance characteristics and the layout of the printed circuit board. Accordingly, evaluate your system and observe waveforms before actual use and decide use of elements and the values of resistors and capacitors. •Connect a capacitor between the Ext. Cap. pin and the Vss pin. The capacitor should have a 2.2 µF capacitor (Tantalum capaci- tor) and a 0.1 µF capacitor (ceramic capacitor) connected in parallel. Figure 95 for the proper positions of the peripheral com- ponents. USAGE NOTES |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |