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7643 Datasheet(PDF) 254 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 254 Page - Renesas Technology Corp |
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254 / 424 page ![]() Rev.2.00 Aug 28, 2006 page 133 of 202 7643 Group REJ09B0133-0200 APPLICATION 2.6 USB Fig. 2.6.28 Control procedure (2) (USB block generating) FSM1 FSM2 FSD FSC 0016 FF16 FF16 6116 (Address : 6D16) (Address : 6E16) (Address : 6F16) (Address : 6C16) USB clock generating • USB function control unit initializing • Frequency synthesizer: enabled • fUSB=fVCO • Setting of division ratio of 48 MHz clock FSC (Address : 6C16),bit7? 0 1 0.1ms wait • Check of lock state USBC 1016 (Address : 1316) • USB line driver: enabled • USB line driver current : High Note 1: Set these only when using the MCU in Vcc = 5 V. Wait • In order to stabilize the frequency synthesizer, after the synthesizer is enabled, the 2 ms wait is required. Wait • Wait as shown below is required; 2 to 5 ms: Time until 3.3 V is supplied to Ext.Cap pin + 1 ms USBC 1 (Address : 1316),bit5 • USB clock: enabled Wait • Wait for 4 cycles or more of φ is required. USBC 1 (Address : 1316),bit7 RTS • USB function control unit: enabled FSC 4116 (Address : 6C16) (Note 1) |
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