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7643 Datasheet(PDF) 258 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 258 Page - Renesas Technology Corp |
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258 / 424 page ![]() Rev.2.00 Aug 28, 2006 page 137 of 202 7643 Group REJ09B0133-0200 APPLICATION 2.6 USB Fig. 2.6.32 Registers setting (USB endpoint 1 OUT receive) Endpoint index: Endpoint 1 USB endpoint index register (Address : 5816) USBINDEX b0 b7 000 0 01 0 0 USB endpoint 1 OUT write count register (Address : 5D16) b0 b7 OUT_PKT_RDY flag: This bit is set to “1” when data is received. USB endpoint x OUT control register (Address : 5A16) OUT_CSR b0 b7 0 AUTO_CLR bit: disabled WRT_CNT Count value (3) Application example 3: USB receive Outline: Data is received in a USB OUT receive Specification: - Data is received in the endpoint 1 OUT interrupt routine. - AUTO_CLR bit (address 005A16, bit 7) = “0” (disabled). Figure 2.6.32 shows the related register settings, Figure 2.6.33 shows a control procedure example. |
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