7643 datasheet(286/424 Pages) RENESAS

286 / 424 page

Rev.2.00

Aug 28, 2006

page 165 of 202

7643 Group

REJ09B0133-0200

APPLICATION

2.6 USB

(4)

USB Communication

q In applications requiring high-reliability, we recommend providing the system with protective

measures such as USB function initialization by software or USB reset by the host to prevent USB

communication from being terminated unexpectedly, for example due to external causes such as

noise.

(5)

Registers and bits

q When using endpoint 0, use USB endpoint 0 IN max. packet size register (IN_MAXP: address

005B16) for data transfer to/from (IN packet size or OUT packet size).

q When not using USB endpoint x (x = 0 to 2) IN max. packet size register (IN_MAXP: address

005B16), USB endpoint x (x = 0 to 2) OUT max. packet size register (OUT_MAXP: address

005C16), clear “0” to this register.

q Make sure to write to/read from the USB interrupt status register 1 (USBIS1: address 005216)

first and then USB interrupt status register 2 (USBIS2: address 005316).

q When accessing the following registers, always confirm that the index (bits 0 to 2 of USB

endpoint index register (USBINDEX: address 005816) is set properly.

- USB endpoint x IN control register (IN_CSR: address 005916)

- USB endpoint x OUT control register (OUT_CSR: address 005A16)

- USB endpoint x IN max. packet size register (IN_MAXP: address 005B16)

- USB endpoint x OUT max. packet size register (OUT_MAXP: address 005C16)

- USB endpoint x OUT write count register (WRT_CNT: address 005D16)

- USB endpoint FIFO mode register (USBFIFOMR: address 005F16)

q When the USB reset interrupt status flag is kept at “1”, all other flags in the USB internal

registers (addresses 005016 to 005F16) will return to their reset status.

However, the following registers are not affected by the USB reset:

- USB control register (USBC: address 001316),

- Frequency synthesizer control register (FSC: address 006C16),

- Clock control register (CCR: address 001F16),

- USB endpoint-x FIFO register (USB FIFOx: addresses 006016 to 006216).

q When not using the USB function, set the USB line driver supply enable bit of the USB control

q The IN_PKT_RDY Bit can be set by software even when using the AUTO_SET function.

q When the USB clock is disabled, do not write to any USB internal registers (addresses 005016

to 006216) other than registers USBC, CCR, and FSC.

q In the USB suspend state, USB enable bit is fixed to “1” (USB clock enabled state).

To write to a USB register other than registers USBC, CCR, and FSC (i.e. to addresses 005016

to 006216) after the MCU recovers from the USB suspend state, set the USB clock enable bit

(USBC, bit 5) to “1”, and write to the register after a

φ = 4 wait cycle.

q When using the MCU at Vcc = 3V, set the USB line driver supply selection bit (USBC, bit 4)

to “0” (line driver disabled).

Note that the USB line driver divider select bit (USBC, bit 3) does not affect the USB operation.

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