MC68HC908AP16CFB datasheet(197/440 Pages) MOTOROLA

197 / 440 page

Timer Interface Module (TIM)

I/O Registers

MC68HC908AP Family — Rev. 2.5

Data Sheet

MOTOROLA

197

11.9.2 TIM Counter Registers

The two read-only TIM counter registers contain the high and low bytes

of the value in the TIM counter. Reading the high byte (TCNTH) latches

the contents of the low byte (TCNTL) into a buffer. Subsequent reads of

TCNTH do not affect the latched TCNTL value until TCNTL is read.

Reset clears the TIM counter registers. Setting the TIM reset bit (TRST)

also clears the TIM counter registers.

NOTE:

If you read TCNTH during a break interrupt, be sure to unlatch TCNTL

by reading TCNTL before exiting the break interrupt. Otherwise, TCNTL

retains the value latched during the break.

Address: T1CNTH, $0021 and T2CNTH, $002C

Bit 7

654321

Bit 0

Read:

Bit 15

Bit 8

Write:

Reset:

00000000

= Unimplemented

Figure 11-5. TIM Counter Registers High (TCNTH)

Address: T1CNTL, $0022 and T2CNTL, $002D

Bit 7

654321

Bit 0

Read:

Bit 7

654321

Bit 0

Write:

Reset:

00000000

= Unimplemented

Figure 11-6. TIM Counter Registers Low (TCNTL)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

MC68HC908AP16CFB Datasheet(PDF) 197 Page - Motorola, Inc

MC68HC908AP16CFB Datasheet(HTML) 197 Page - Motorola, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL