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5238-DS03-405-R Datasheet(PDF) 26 Page - Broadcom Corporation. |
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5238-DS03-405-R Datasheet(HTML) 26 Page - Broadcom Corporation. |
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26 / 76 page ![]() BCM5238 Advance Data Sheet 1/31/03 Broa d c om Co rp o r a t i o n Page 18 LED Display Output Modes Document 5238-DS03-405-R Section 5: L E D Di sp lay Out put Mod e s DESCRIPTION The BCM5238 offers a rich set of LED display outputs through serial, parallel, and extended parallel LED modes. There are two serial LED modes available, serial LED mode and low-cost serial LED mode. Serial LED modes are selected by hardware only during power-on reset. SERIAL LED MODE Serial LED mode is enabled only by holding the SERIAL_EN pin high and LC_SER_EN pin low during power-on reset. If serial LED mode is enabled, low-cost serial LED mode is disabled. In serial LED mode the BCM5238 sources a serial data stream, the associated clock, and a framing signal as follows: • a serial data stream, SLED_DO, which is an active low bit stream containing 48 bits per frame. • a serial data clock, SLED_CLK, which runs at approximately 2 MHz to clock out SLED_DO on the falling edge of this clock. SLED_DO is valid on the rising edge of this clock. • a framing pulse, SFRAME, which is an active high pulse occurring once every 48 SLED_DO bit times. SFRAME goes high coincident with bit 0 of port 1. The BCM5238 provides two different serial LED streams, described below: • When the serial LED mode is enabled by hardware, and no further action is taken, the LED stream is selected for SLED_DO (as shown in Table 5) depending on the values of bit 14 and 15 of MII register 1Ah. The data stream contains bit 0 to bit 5 for port 1, bit 0 to bit 5 for port 2, ..., bit 0 to bit 5 for port 8. NOTE—A global interrupt indicates an interrupt from any of the eight PHY as if they were ORed together. A port interrupt is provided on a per PHY basis. • If MII shadow register 1Ah (of PHY 2 of 8) bit 9, Serial LED Program Enable, is set to a 1, then the serial LED stream is selected by the serial bank select bits as specified in Table 6, Table 7, Table 8, Table 9, Table 10 and Table 11. LED stream will contain bank 1 output for port 1 through port 8, bank 2 output for port 1 through port 8, ..., bank 6 output for port 1 through port 8. Table 5: Serial LED Mode Bit Framing Register 1AH Serial bit 5 Serial bit 4 Serial bit 3 Serial bit 2 Serial bit 1 Serial bit 0 Bit 15 = 0 Bit 14 = 0 FDX COL Speed100 Link Transmit Receive Bit 15 = 0 Bit 14 = 1 FDX Global Interrupt Speed100 Link Port Interrupt Activity Bit 15 = 1 Bit 14 = 0 FDX COL Speed100 Link FDX Activity Bit 15 = 1 Bit 14 = 1 FDX Global Interrupt Speed100 Link FDX Activity |
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