| Electronic Components Datasheet Search |
|
5238-DS03-405-R Datasheet(PDF) 7 Page - Broadcom Corporation. |
|
|
|||||||||||||||||||||||||||||
5238-DS03-405-R Datasheet(HTML) 7 Page - Broadcom Corporation. |
|
7 / 76 page ![]() Advance Data Sheet BCM5238 1/31/03 Broa d c om Co rp o r a t i o n Document 5238-DS03-405-R Page v LIST OF TABLES Table 1: 4B5B encoding ..................................................................................................................................... 1 Table 2: Pin Definitions....................................................................................................................................... 7 Table 3: Receive FIFO Size Select .................................................................................................................. 18 Table 4: Jumbo packet enable and descrambler lock timer ............................................................................. 18 Table 5: Serial LED Mode Bit Framing ............................................................................................................. 19 Table 6: Serial Mode Bank 1 LED Selection .................................................................................................... 20 Table 7: Serial Mode Bank 2 LED Selection .................................................................................................... 20 Table 8: Serial Mode Bank 3 LED Selection .................................................................................................... 21 Table 9: Serial Mode Bank 4 LED Selection .................................................................................................... 21 Table 10: Serial Mode Bank 5 LED Selection .................................................................................................. 22 Table 11: Serial Mode Bank 6 LED Selection .................................................................................................. 22 Table 12: Parallel LED Mode LED1 Selection .................................................................................................. 23 Table 13: Parallel LED Mode LED2 Selection .................................................................................................. 23 Table 14: Extended Parallel LED Selection...................................................................................................... 24 Table 15: MII management frame format ......................................................................................................... 25 Table 16: MII Register Map Summary.............................................................................................................. 27 Table 17: MII Shadow Register Map Summary (MII Register 1Fh, bit7 = 1) .................................................... 29 Table 18: MII Control register (Address 00d, 00h) ........................................................................................... 30 Table 19: MII Status register (Address 01d, 01h)............................................................................................. 31 Table 20: PHY Identifier Registers (Addresses 02d and 03d, 02h and 03h).................................................... 32 Table 21: Auto-Negotiation Advertisement Register (Address 04d, 04h)......................................................... 33 Table 22: Auto-Negotiation Link Partner Ability Register (Address 05d, 05h) .................................................. 34 Table 23: Auto-Negotiation Expansion Register (Address 06d, 06h ................................................................ 35 Table 24: Next Page Transmit Register (Address 07d, 07h)............................................................................ 36 Table 25: Next Page Transmit Register (Address 08d, 08h)............................................................................ 37 Table 26: 100-BASE-X Auxiliary Control register (Address 16d, 10h) ............................................................. 37 Table 27: 100BASE-X Auxiliary Status Register (Address 17d, 11h)............................................................... 39 Table 28: 100BASE-X Receive Error Counter (Address 18d, 12h) .................................................................. 40 Table 29: 100BASE-X False Carrier Sense Counter (Address 19d, 13h) ........................................................ 40 Table 30: 100BASE-X Disconnect Counter (Address 20d, 14h) ...................................................................... 41 Table 31: Auxiliary Control/Status Register (Address 24d, 18h) ...................................................................... 41 Table 32: Auxiliary Status Summary Register (Address 25d, 19h) ..................................................................43 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |