5238-DS03-405-R datasheet(55/76 Pages) BOARDCOM

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Advance Data Sheet

BCM5238

1/31/03

Broa d c om Co rp o r a t i o n

Document

5238-DS03-405-R

Auxiliary Multiple PHY Register

Page 47

Activity LED Disable. When set to 1, disables the ACTLED output pin. When 0, ACTLED output pin is enabled.

Link LED Disable. When set to 1, disables the Link LED output pin. When 0, Link LED output is enabled.

Block TXEN Mode. When this mode is enabled, short IPGs of 1, 2, 3 or 4 TXC cycles all result in the insertion of two IDLEs

before the beginning of the next packet’s JK symbols.

AUXILIARY MULTIPLE PHY REGISTER

HCD Bits. Bits 15:11 of the Auxiliary Multiple PHY register are five read-only bits that report the highest common

denominator (HCD) result of the auto-negotiation process. Immediately upon entering the Link Pass state after each reset

or Restart Auto-Negotiation, only one of these five bits will be 1. The Link Pass state is identified by a 1 in bit 6 or 7 of this

register. The HCD bits are reset to 0 every time auto-negotiation is restarted or the BCM5238 is reset. Note that for their

intended application, these bits uniquely identify the HCD only after the first Link Pass after reset or restart of auto-

Reserveda

––

a. When writing to this register, preserve existing values of reserved bits by completing a Read/Modify Write.

Table 37: Auxiliary Multiple PHY Register (Address 30d, 1Eh)

Bit

Name

R/W

Description

Default

HCD_TX_FDX

1 = Auto-negotiation result is 100BASE-TX full-duplex

HCD_T4

1 = Auto-negotiation result is 100BASE-T4

HCD_TX

1 = Auto-negotiation result is 100BASE-TX

HCD_10BASE-T_FDX

1 = Auto-negotiation result is 10BASE-T full-duplex

HCD_10BASE-T

1 = Auto-negotiation result is 10BASE-T

10:9

Reserveda

a. When writing to this register, preserve existing values of reserved bits by completing a Read/Modify Write.

––

Restart Auto-Negotiation

R/W

(SC)

1 = Restart auto-negotiation process

0 = (No effect)

Auto-Negotiation Complete

1 = Auto-negotiation process completed

0 = Auto-negotiation process not completed

Acknowledge Complete

1 = Auto-Negotiation Acknowledge completed

Acknowledge Detected

1 = Auto-Negotiation Acknowledge detected

Ability Detect

1 = Auto-Negotiation Waiting for LP ability

Super Isolate

R/W

1 = Super Isolate mode

0 = Normal operation

Reserveda

––

10BASE-T Serial Mode

R/W

1 = Enable 10BASE-T Serial mode

0 = Disable 10BASE-T Serial mode

Reserveda

––

Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear

after read operation. Use default values of reserved bit(s) when writing to reserved bit(s).

Table 36: Auxiliary Mode Register (Address 29d, 1Dh) (Cont.)

Bit

Name

R/W

Description

Default

Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear

after read operation. Use default values of reserved bit(s) when writing to reserved bit(s).

5238-DS03-405-R Datasheet(PDF) 55 Page - Broadcom Corporation.

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