5238-DS03-405-R datasheet(56/76 Pages) BOARDCOM

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BCM5238

Advance Data Sheet

1/31/03

Broa d c om Co rp o r a t i o n

Page 48

Broadcom Test Register

Document

5238-DS03-405-R

negotiation. On later link fault and subsequent renegotiations, if the ability of the link partner is different, more than one of

the above bits may be active.

Restart Auto-Negotiation. A self-clearing bit that allows the auto-negotiation process to be restarted, regardless of the

current status of the state machine. For this bit to work, auto-negotiation must be enabled. Writing a 1 to this bit restarts auto-

negotiation. Since the bit is self-clearing, it always returns a 0 when read. The operation of this bit is identical to bit 9 of the

Control register.

Auto-Negotiation Complete. This read-only bit returns a 1 after the auto-negotiation process has been completed. It

remains 1 until the auto-negotiation process is restarted, a link fault occurs, or the chip is reset. If auto-negotiation is disabled

or the process is still in progress, the bit returns a 0.

Acknowledge Complete. This read-only bit returns a 1 after the acknowledgment exchange portion of the auto-negotiation

process has been completed and the arbitrator state machine has exited the Acknowledge Complete state. It remains this

value until the auto-negotiation process is restarted, a link fault occurs, auto-negotiation is disabled, or the BCM5238 is reset.

Acknowledge Detected. This read-only bit is set to 1 when the arbitrator state machine exits the Acknowledge Detected

state. It remains high until the auto-negotiation process is restarted, or the BCM5238 is reset.

Ability Detect. This read-only bit returns a 1 when the auto-negotiation state machine is in the Ability Detect state. It enters

this state a specified time period after the auto-negotiation process begins, and exits after the first FLP burst or link pulses

are detected from the link partner. This bit returns a 0 any time the auto-negotiation state machine is not in the Ability Detect

state.

Super Isolate. Writing a 1 to this bit places the BCM5248 into the super Isolate mode. Similar to the Isolate mode, all

TXD0{n} inputs are ignored, and all RXD0{n}I outputs are tri-stated. Additionally, all link pulses are suppressed. This allows

the BCM5248 to coexist with another PHY on the same adapter card, with only one being activated at any time.

10BASE-T Serial Mode. Writing a 1 to bit 1 of the Auxiliary Mode register enables the 10BASE-T serial mode. Serial

operation is not available in 100BASE-X mode.

BROADCOM TEST REGISTER

Table 38: Broadcom Test Register (Address 31d, 1Fh)

BIt

Name

R/W

Description

Default

15:8

Reserveda

a. When writing to this register, preserve existing values of reserved bits by completing a Read/Modify Write.

––

00h

Shadow Register Enable

R/W

1 = Enable shadow registers 18h–1Eh

0 = Disable shadow registers

Reserveda

––

Reserveda

––

4:0

Reserveda

––

0Bh

Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear

after read operation. Use default values of reserved bit(s) when writing to reserved bit(s).

5238-DS03-405-R Datasheet(PDF) 56 Page - Broadcom Corporation.

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