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5238-DS03-405-R Datasheet(PDF) 37 Page - Broadcom Corporation. |
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5238-DS03-405-R Datasheet(HTML) 37 Page - Broadcom Corporation. |
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37 / 76 page ![]() Advance Data Sheet BCM5238 1/31/03 Broa d c om Co rp o r a t i o n Document 5238-DS03-405-R MII Management Interface: Register Programming Page 29 MII CONTROL REGISTER LSoft Reset. To reset the BCM5248 by software control, a 1 must be written to bit 15 of the Control Register using an MII write operation. The bit clears itself after the reset process is complete, and need not be cleared using a second MII write. Writes to other Control Register bits will have no effect until the reset process is completed, which requires approximately 1 µs. Writing a 0 to this bit has no effect. Since this bit is self-clearing, after a few cycles from a write operation, it returns a 1 when read. Loopback. The BCM5248 may be placed into loopback mode by writing a 1 to bit 14 of the Control Register. The loopback mode may be cleared by writing a 0 to bit 14 of the control register, or by resetting the chip. When this bit is read, it returns a 0 when the chip is in software-controlled loopback mode, otherwise it returns a 0. Forced Speed Selection. If auto-negotiation is enabled, this bit has no effect on the speed selection. However, if auto- negotiation is disabled by software control, the operating speed of the BCM5248 can be forced by writing the appropriate value to bit 13 of the Control Register. Writing a 1 to this bit forces 100BASE-X operation, while writing a 0 forces 10BASE-T operation. When this bit is read, it returns the value of the software-controlled forced speed selection only. To read the overall state of forced speed selection, including both hardware and software control, use bit 2 of the Auxiliary Error and General Status Register, 1Ch. Auto-Negotiation Enable. Auto-negotiation can be disabled either by hardware or software control. If the ANEN input pin is driven to a logic 0, auto-negotiation is disabled by hardware control. If bit 12 of the Control Register is written with a value of 0, auto-negotiation is disabled by software control. When auto-negotiation is disabled in this manner, writing a 1 to the same bit of the Control Register or resetting the chip re-enables auto-negotiation. Writing to this bit has no effect when auto- negotiation has been disabled by hardware control. When read, this bit returns the value most recently written to this location, or 1 if it has not been written since the last chip reset. Power Down. The BCM5248 does not have a low power mode. Table 18: MII Control register (Address 00d, 00h) Bit Name R/W Description Default 15 Soft Reset R/W (SC) 1 = PHY reset 0 = Normal operation 0 14 Loopback R/W 1 = loopback mode 0 = Normal operation 0 13 Forced Speed Selection R/W 1 = 100 Mbps 0 = 10 Mbps 1 12 Auto-Negotiation Enable R/W 1 = Auto-negotiation enable 0 = Auto-negotiation disable 1 11 Power Down RO 0 = Normal operation 0 10 Isolate R/W 1 = Electrically isolate PHY from SMII 0 = Normal operation 0 9 Restart Auto-Negotiation R/W (SC) 1 = Restart auto-negotiation process 0 = Normal operation 0 8 Duplex Mode R/W 1 = Full-Duplex 0 = Half-duplex 0 7:0 Reserveda a. When writing to this register, preserve existing values of reserved bits by completing a Read/Modify Write. –– 0 Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read operation. Use default values of reserved bit(s) when writing to reserved bit(s). |
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