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5238-DS03-405-R Datasheet(PDF) 53 Page - Broadcom Corporation. |
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5238-DS03-405-R Datasheet(HTML) 53 Page - Broadcom Corporation. |
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53 / 76 page ![]() Advance Data Sheet BCM5238 1/31/03 Broa d c om Co rp o r a t i o n Document 5238-DS03-405-R 10BASE-T Auxiliary Error and General Status Register Page 45 Activity/Link LED Mode. When enabled, the receive output goes active upon acquiring link and pulses during receive or transmit activity, otherwise known as blinking link LED. Qualified Parallel Detect Mode. This bit allows the auto-negotiation/parallel-detection process to be qualified with information in the Advertisement register. If this bit is not set, the local BCM5238 device is enabled to auto-negotiate, and the far-end device is a 10BASE-T or 100BASE-X non-auto-negotiating legacy type, the local device will auto-negotiate/parallel-detect the far-end device, regardless of the contents of its Advertisement Register (04h). If this bit is set, the local device compares the link speed detected to the contents of its Advertisement register. If the particular link speed is enabled in the Advertisement register, the local device asserts link. If the link speed is disabled in this register, then the local device does not assert link, and continues monitoring for a matching capability link speed. 10BASE-T AUXILIARY ERROR AND GENERAL STATUS REGISTER MDIX Status. This bit, when read as a 1, indicates that the MDI TD± and RD± signals for the BCM5238 have been swapped. The cause for this is one of the following: Table 35: 10BASE-T Auxiliary Error and General Status Register (Address 28d, 1Ch) Bit Name R/W Description Default 15:14 Reserveda a. When writing to this register, preserve existing values of reserved bits by completing a Read/Modify Write. –– 0 13 MDIX Status RO 0 = MDI is in use 1 = MDIX is in use 0 12 MDIX Manual Swap RW 0 = MDI or MDIX if MDIX is not disabled 1 = Force MDIX 0 11 HP Auto-MDIX Disable R/W 0 = Enable HP Auto-MDIX 1 = Disable HP Auto-MDIX 0 10 Manchester Code Error RO 1 = Manchester code error (10BASE-T) 0 9 End Of Frame Error RO 1 = EOF detection error (10BASE-T) 0 8 Reserveda –– 0 7:5 Reserveda –– 001 4 Reserveda –– 0 3 Auto-Negotiation Indication RO 1 = Auto-negotiation activated 0 = Speed forced manually 1 2 Force 100/10 Indication RO 1 = Speed forced to 100BASE-X 0 = Speed forced to 10BASE-T 1 1 Speed Indication RO 1 = 100BASE-X 0 = 10BASE-T 0 0 Full-Duplex Indication RO 1 = Full-duplex active 0 = Full-duplex not active 0 Note: All Error bits in the Auxiliary Error and General Status Register are read-only and are latched high. When certain types of errors occur in the BCM5248, one or more corresponding error bits become 1. They remain so until the register is read, or until a chip reset occurs. All such errors necessarily result in data errors, and are indicated by a high value on the RXER signal at the time the error occurs. Note: R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read operation. Use default values of reserved bit(s) when writing to reserved bit(s). |
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