5238-DS03-405-R datasheet(27/76 Pages) BOARDCOM

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Advance Data Sheet

BCM5238

1/31/03

Broa d c om Co rp o r a t i o n

Document

5238-DS03-405-R

Serial LED Mode

Page 19

LOW-COST SERIAL LED MODE

The low-cost serial LED mode is enabled by pulling both LC_SER_EN pin and SER_EN pin high during power-on reset.

When enabled, the serial LED data stream, SLED_DO, is shifted out on the falling edge of SLED_CLK. SLED_DO is valid

on the rising edge of this clock. The data is shifted so that the update of LEDs using a shift register to drive the display LEDs

does not cause noticeable flicker in normal operation.

There are six banks, bank 1 through bank 6, associated with six LED outputs. Each bank has its own MII register bits that

select a LED signal to output from that bank. Selected signal from each bank is shifted out on the LED_DO pin in the following

order: Bank 1 for port 1 through port 8, Bank 2 for port 1 through port 8,...., and Bank 6 for port 1 through 8 for a total of 48

LED outputs. The low cost serial LED mode programmable banks are located in the MII shadow register 1Ah of PHY 2, 3

and 4. See Table 6, Table 7, Table 8, Table 9, Table 10 and Table 11 for programming details. The default LED outputs are

SPEED, LINK, FULL-DUPLEX, ACTIVITY, SPEED, and LINK for bank 1 through bank 6, respectively.

Table 6: Serial Mode Bank 1 LED Selection

MII Shadow Register 1Ah, (PHY 4 of 8), Bits [2:0]

Value

LED Selection

Serial Bank 1 Select Bits [2:0]

Speed

Activity

Full-duplex

3Transmit

Receive

Interrupt

Collision

7Link

Note: MII Shadow register is accessed by setting MII register 1Fh bit 7 to a 1.

Table 7: Serial Mode Bank 2 LED Selection

MII Shadow Register 1Ah, (PHY 4 of 8), Bits [5:3]

Value

LED Selection

Serial LED Bank 2 Select Bits [2:0]

Link

Speed

Activity

Full-duplex

4Transmit

Receive

Interrupt

Collision

Note: MII shadow register is accessed by setting MII register 1Fh bit 7 to a 1.

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