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ATTINY817-MFR. Datasheet(PDF) 26 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 26 Page - Microchip Technology |
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26 / 492 page ![]() RSTCTRL - Reset Controller 6.9.4.3 Oscillator Configuration Name: OSCCFG Offset: 0x02 Reset: - Property: - Bit 7 6 5 4 3 2 1 0 OSCLOCK FREQSEL[1:0] Access R R R Reset 0 1 0 Bit 7 – OSCLOCK: Oscillator Lock This fuse bit is loaded to LOCK in CLKCTRL.OSC20MCALIBB during reset. Value Description 0 Calibration registers of the 20 MHz oscillator are accessible 1 Calibration registers of the 20 MHz oscillator are locked Bits 1:0 – FREQSEL[1:0]: Frequency Select These bits selects the operation frequency of the 16/20MHz internal oscillator (OSC20M), and determine the respective factory calibration values to be written to CAL20M in CLKCTRL.OSC20MCALIBA and TEMPCAL20M in CLKCTRL.OSC20MCALIBB. Value Description 0x1 Run at 16MHz with corresponding factory calibration 0x2 Run at 20MHz with corresponding factory calibration Other Reserved Related Links Register Summary - CLKCTRL RSTCTRL - Reset Controller 6.9.4.4 Timer Counter Type D Configuration The bit values of this fuse register are written to the corresponding bits in the TCD.FAULTCTRL register of TCD0 at start-up. The CMPEN and CMP settings of the TCD will only be reloaded from the FUSE values after a Power-On Reset. For all other resets the corresponding TCD settings of the device will remain unchanged. Name: TCD0CFG Offset: 0x04 Reset: - Property: - ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 26 |
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