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ATTINY817-MFR. Datasheet(PDF) 27 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 27 Page - Microchip Technology |
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27 / 492 page  Bit 7 6 5 4 3 2 1 0 CMPDEN CMPCEN CMPBEN CMPAEN CMPD CMPC CMPB CMPA Access R R R R R R R R Reset 0 0 0 0 0 0 0 0 Bits 4, 5, 6, 7 – CMPAEN, CMPBEN, CMPCEN, CMPDEN: Compare x Enable Value Description 0 Compare x output on Pin is disabled 1 Compare x output on Pin is enabled Bits 0, 1, 2, 3 – CMPA, CMPB, CMPC, CMPD: Compare x This bit selects the default state of Compare x after Reset, or when entering debug if FAULTDET is '1'. Value Description 0 Compare x default state is 0 1 Compare x default state is 1 Related Links Register Summary - TCD RSTCTRL - Reset Controller 6.9.4.5 System Configuration 0 Name: SYSCFG0 Offset: 0x05 Reset: 0xC4 Property: - Bit 7 6 5 4 3 2 1 0 CRCSRC[1:0] RSTPINCFG[1:0] EESAVE Access R R R R R Reset 1 1 0 1 0 Bits 7:6 – CRCSRC[1:0]: CRC Source See CRC description for more information about the functionality. Value Name Description 00 FLASH CRC of full Flash (boot, application code and application data) 01 BOOT CRC of boot section 10 BOOTAPP CRC of application code and boot sections 11 NOCRC No CRC Bits 3:2 – RSTPINCFG[1:0]: Reset Pin Configuration These bits select the Reset/UPDI pin configuration. Value Description 0x0 GPIO 0x1 UPDI 0x2 RESET ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 27 |
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