ATTINY817-MFR. datasheet(38/492 Pages) MICROCHIP

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8.5

Functional Description

8.5.1

Program Flow

After Reset, the CPU will execute instructions from the lowest address in the Flash program memory,

0x0000. The program counter (PC) address the next instruction to be fetched.

Program flow is supported by conditional and unconditional jump and call instructions, capable of

addressing the whole address space directly. Most AVR instructions use a 16-bit word format, and a

limited number uses a 32-bit format.

During interrupts and subroutine calls, the return address PC is stored on the stack as a word pointer.

The stack is allocated in the general data SRAM, and consequently the stack size is only limited by the

total SRAM size and the usage of the SRAM. After Reset, the stack pointer (SP) points to the highest

address in the internal SRAM. The SP is read/write accessible in the I/O memory space, enabling easy

implementation of multiple stacks or stack areas. The data SRAM can easily be accessed through the

five different addressing modes supported by the AVR CPU.

8.5.2

Instruction Execution Timing

The AVR CPU is clocked by the CPU clock, CLK_CPU. No internal clock division is applied. The Figure

below shows the parallel instruction fetches and instruction executions enabled by the Harvard

architecture and the fast-access register file concept. This is the basic pipelining concept enabling up to

1MIPS/MHz performance with high efficiency.

Figure 8-2. The Parallel Instruction Fetches and Instruction Executions

clk

1st Instruction Fetch

1st Instruction Execute

2nd Instruction Fetch

2nd Instruction Execute

3rd Instruction Fetch

3rd Instruction Execute

4th Instruction Fetch

CPU

The following Figure shows the internal timing concept for the register file. In a single clock cycle, an ALU

operation using two register operands is executed, and the result is stored in the destination register.

Figure 8-3. Single Cycle ALU Operation

Total Execution Time

ALU Operation Execute

Result Write Back

clk

CPU

8.5.3

Status Register

The Status register (CPU.SREG) contains information about the result of the most recently executed

arithmetic or logic instruction. This information can be used for altering program flow in order to perform

conditional operations.

ATtiny417/817

Datasheet Complete

DS40001901B-page 38

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