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ATTINY817-MFR. Datasheet(PDF) 75 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 75 Page - Microchip Technology |
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75 / 492 page  11.4 Register Summary - SLPCTRL Offset Name Bit Pos. 0x00 CTRLA 7:0 SMODE[1:0] SEN 11.5 Register Description 11.5.1 Control A Name: CTRLA Offset: 0x00 Reset: 0x00 Property: - Bit 7 6 5 4 3 2 1 0 SMODE[1:0] SEN Access R R R R R R/W R/W R/W Reset 0 0 0 0 0 0 0 0 Bits 2:1 – SMODE[1:0]: Sleep Mode Writing these bits selects the sleep mode entered when the Sleep Enable bit (SEN) is written to '1' and the SLEEP instruction is executed. Value Name Description 0x0 IDLE Idle sleep mode enabled 0x1 STANDBY Standby sleep mode enabled 0x2 PDOWN Power Down sleep mode enabled other - Reserved Bit 0 – SEN: Sleep Enable This bit must be written to '1' before the SLEEP instruction is executed to make the MCU enter the selected sleep mode. ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 75 |
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