ATTINY817-MFR. datasheet(39/492 Pages) MICROCHIP

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CPU.SREG is updated after all ALU operations, as specified in the Instruction Set Summary. This will in

many cases remove the need for using the dedicated compare instructions, resulting in faster and more

compact code. CPU.SREG is not automatically stored/restored when entering/returning from an interrupt

service routine. Maintaining the status register between context switches must therefore be handled by

user defined software. CPU.SREG is accessible in the I/O memory space.

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Instruction Set Summary

8.5.4

Stack and Stack Pointer

The Stack is used for storing return addresses after interrupts and subroutine calls. It can also be used

for storing temporary data. The Stack Pointer (SP) always point to the top of the Stack. The SP is defined

by the Stack Pointer bits (SP) in the Stack Pointer register (CPU.SP). CPU.SP is implemented as two 8-

bit registers that are accessible in the I/O memory space.

Data is pushed and popped from the Stack using the PUSH and POP instructions. The Stack grows from

higher to lower memory locations. This implies that pushing data onto the Stack decreases the SP, and

popping data off the Stack increases the SP. The Stack Pointer is automatically set to the highest address

of the internal SRAM after Reset. If the Stack is changed, it must be set to point above address 0x2000,

and it must be defined before both any subroutine calls are executed and before interrupts are enabled.

During interrupts or subroutine calls, the return address is automatically pushed on the Stack as a word

pointer and the SP is decremented by '2'. The return address consists of two bytes and the least

significant byte is pushed on the Stack first (at the higher address). As an example, a byte pointer return

address of 0x0006 is saved on the Stack as 0x0003 (shifted one bit to the right), pointing to the fourth 16-

bit instruction word in the program memory. The return address is popped off the Stack with RETI (when

returning from interrupts) and RET (when returning from subroutine calls) and the SP is incremented by

'2'.

The SP is decremented by '1' when data is pushed on the Stack with the PUSH instruction, and

incremented by '1' when data is popped off the Stack using the POP instruction.

To prevent corruption when updating the Stack pointer from software, a write to SPL will automatically

disable interrupts for up to four instructions or until the next I/O memory write.

8.5.5

The register file consists of 32 8-bit general purpose working registers with single clock cycle access time.

The register file supports the following input/output schemes:

•

One 8-bit output operand and one 8-bit result input

•

Two 8-bit output operands and one 8-bit result input

•

Two 8-bit output operands and one 16-bit result input

•

One 16-bit output operand and one 16-bit result input

Six of the 32 registers can be used as three 16-bit address register pointers for data space addressing,

enabling efficient address calculations.

ATtiny417/817

Datasheet Complete

DS40001901B-page 39

ATTINY817-MFR. Datasheet(PDF) 39 Page - Microchip Technology

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