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ATTINY817-MFR. Datasheet(PDF) 49 Page - Microchip Technology

Part # ATTINY817-MFR.
Description  AVR짰 Microcontroller with Core Independent Peripherals and picoPower짰 Technology
PDF  492 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ATTINY817-MFR. Datasheet(HTML) 49 Page - Microchip Technology

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If FUSE.BOOTEND is written to 0x04 and FUSE.APPEND is written to 0x08, the first
4*256 bytes will be BOOT, the next 4*256 bytes will be APPCODE, and the remaining
Flash will be APPDATA.
Inter-Section Write Protection
Between the three Flash sections, a directional write protection is implemented:
•
Code in the BOOT section can write to APPCODE and APPDATA.
•
Code in APPCODE can write to APPDATA
•
Code in APPDATA cannot write to Flash or EEPROM.
Boot Section Lock and Application Code Section Write Protection
The two lock bits (APCWP and BOOTLOCK in NVMCTRL.CTRLB) can be set to lock further updates of
the respective APPCODE or BOOT section until the next Reset.
The CPU can never write to the BOOT section. NVMCTRL_CTRLB.BOOTLOCK prevents reads and
execution of code from the BOOT section.
9.3.1.2
EEPROM
The EEPROM is divided into a set of pages where one page consists of multiple bytes. The EEPROM
has byte granularity on erase write. Within one page, only the bytes marked to be updated will be erased/
written. The byte is marked by writing a new value to the page buffer for that address location.
9.3.1.3
User Row
The User Row is one extra page of EEPROM. This page can be used to store various data, such as
calibration/configuration data and serial numbers. This page is not erased by a chip erase. The User Row
is written as normal EEPROM, but in addition it can be written through UPDI on a locked device.
9.3.2
Memory Access
9.3.2.1
Read
Reading of the Flash and EEPROM is done by using a load instructions with address according to the
memory map. Reading any of the arrays while a write or erase is in progress will result in a bus wait, and
the instruction will be suspended until the ongoing operation is complete.
9.3.2.2
Page Buffer Load
The page buffer is loaded by writing directly to the memories as defined in the memory map. Flash,
EEPROM and User Row share the same page buffer so only one section can be programmed at one
time. The least significant bits of the address are used to select where in the page buffer the data is
written. The resulting data will be a binary AND operation between the new and the previous content of
the page buffer. The page buffer will automatically be erased (all bits set) after:
•
a device reset
•
any page write or erase operation
•
a clear page buffer command
•
the device wakes up from any sleep mode
9.3.2.3
Programming
For page programming, filling the page buffer and writing the page buffer into Flash, User Row and
EEPROM are two separate operations.
Before programming a flash page with the data in the page buffer, the flash page must be erased. The
page buffer is also erased when the device enter sleep mode. Programming an un-erased flash page will
corrupt its content.
ATtiny417/817
© 2017 Microchip Technology Inc.
Datasheet Complete
DS40001901B-page 49



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