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ATTINY817-MFR. Datasheet(PDF) 3 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 3 Page - Microchip Technology |
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3 / 492 page ![]() Table of Contents Introduction......................................................................................................................1 Features.......................................................................................................................... 1 1. tinyAVR ® 1-Series Overview....................................................................................10 1.1. Configuration Summary..............................................................................................................11 2. Ordering Information................................................................................................12 2.1. ATtiny417................................................................................................................................... 12 2.2. ATtiny817................................................................................................................................... 12 3. Block Diagram......................................................................................................... 13 4. Pinout...................................................................................................................... 15 4.1. 24-pin VQFN.............................................................................................................................. 15 5. I/O Multiplexing and Considerations........................................................................16 5.1. Multiplexed Signals.................................................................................................................... 16 6. Memories.................................................................................................................17 6.1. Overview.................................................................................................................................... 17 6.2. Memory Map.............................................................................................................................. 17 6.3. In-System Reprogrammable Flash Program Memory................................................................17 6.4. SRAM Data Memory.................................................................................................................. 18 6.5. EEPROM Data Memory............................................................................................................. 18 6.6. User Row....................................................................................................................................18 6.7. Signature Bytes.......................................................................................................................... 18 6.8. I/O Memory.................................................................................................................................19 6.9. FUSES - Configuration and User Fuses.................................................................................... 20 7. Peripherals and Architecture................................................................................... 31 7.1. Peripheral Module Address Map................................................................................................ 31 7.2. Interrupt Vector Mapping............................................................................................................ 32 7.3. SYSCFG - System Configuration............................................................................................... 33 8. AVR CPU.................................................................................................................35 8.1. Features..................................................................................................................................... 35 8.2. Overview.................................................................................................................................... 35 8.3. Architecture................................................................................................................................ 35 8.4. ALU - Arithmetic Logic Unit........................................................................................................ 37 8.5. Functional Description................................................................................................................38 8.6. Register Summary - CPU...........................................................................................................43 8.7. Register Description................................................................................................................... 43 9. NVMCTRL - Non Volatile Memory Controller.......................................................... 46 9.1. Features..................................................................................................................................... 46 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 3 |
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