Electronic Components Datasheet Search
  New Zealand  ▼
ALLDATASHEET.CO.NZ

X  

ATTINY817-MFR. Datasheet(PDF) 41 Page - Microchip Technology

Part # ATTINY817-MFR.
Description  AVR짰 Microcontroller with Core Independent Peripherals and picoPower짰 Technology
PDF  492 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

ATTINY817-MFR. Datasheet(HTML) 41 Page - Microchip Technology

Back Button ATTINY817-MFR. Datasheet HTML 37Page - Microchip Technology ATTINY817-MFR. Datasheet HTML 38Page - Microchip Technology ATTINY817-MFR. Datasheet HTML 39Page - Microchip Technology ATTINY817-MFR. Datasheet HTML 40Page - Microchip Technology ATTINY817-MFR. Datasheet HTML 41Page - Microchip Technology ATTINY817-MFR. Datasheet HTML 42Page - Microchip Technology ATTINY817-MFR. Datasheet HTML 43Page - Microchip Technology ATTINY817-MFR. Datasheet HTML 44Page - Microchip Technology ATTINY817-MFR. Datasheet HTML 45Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 41 / 492 page
background image
8.5.6
Accessing 16-bit Registers
The AVR data bus is 8 bits wide, and so accessing 16-bit registers requires atomic operations. These
registers must be byte-accessed using two read or write operations. 16-bit registers are connected to the
8-bit bus and a temporary register using a 16-bit bus.
For a write operation, the low byte of the 16-bit register must be written before the high byte. The low byte
is then written into the temporary register. When the high byte of the 16-bit register is written, the
temporary register is copied into the low byte of the 16-bit register in the same clock cycle.
For a read operation, the low byte of the 16-bit register must be read before the high byte. When the low
byte register is read by the CPU, the high byte of the 16-bit register is copied into the temporary register
in the same clock cycle as the low byte is read. When the high byte is read, it is then read from the
temporary register.
This ensures that the low and high bytes of 16-bit registers are always accessed simultaneously when
reading or writing the register.
Interrupts can corrupt the timed sequence if an interrupt is triggered and accesses the same 16-bit
register during an atomic 16-bit read/write operation. To prevent this, interrupts can be disabled when
writing or reading 16-bit registers.
The temporary registers can also be read and written directly from user software.
8.5.7
CCP - Configuration Change Protection
System critical I/O register settings are protected from accidental modification. Flash self-programming
(via store to NVM controller) is protected from accidental execution. This is handled globally by the
configuration change protection (CCP) register.
Changes to the protected I/O registers or bits, or execution of protected instructions, are only possible
after the CPU writes a signature to the CCP register. The different signatures are listed in the description
of the CCP register (CPU.CCP).
There are two modes of operation: one for protected I/O registers, and one for the protected self-
programming.
Related Links
CCP
8.5.7.1
Sequence for Write Operation to Configuration Change Protected I/O Registers
In order to write to registers protected by CCP, these steps are required:
1.
The software writes the signature that enables change of protected I/O registers to the CCP bit field
in the CPU.CCP register.
2.
Within four instructions, the software must write the appropriate data to the protected register.
Most protected registers also contain a write enable/change enable/lock bit. This bit must be written
to '1' in the same operation as the data are written.
The protected change is immediately disabled if the CPU performs write operations to the I/O
register or data memory, if load or store accesses to Flash, NVMCTRL, EEPROM are conducted,
or if the SLEEP instruction is executed.
8.5.7.2
Sequence for Execution of Self-Programming
In order to execute self-programming (the execution of writes to the NVM controller's command register),
these steps are required:
1.
The software temporary enables self-programming by writing the SPM signature to the CCP
register (CPU.CCP).
ATtiny417/817
© 2017 Microchip Technology Inc.
Datasheet Complete
DS40001901B-page 41



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com