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ATTINY817-MFR. Datasheet(PDF) 72 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 72 Page - Microchip Technology |
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72 / 492 page  Table 11-1. SLPCTRL System Dependencies Dependency Applicable Peripheral Clocks Yes CLKCTRL I/O Lines and Connections No - Interrupts no - Events No - Debug Yes UPDI 11.2.2.1 Clocks This peripheral depends on the peripheral clock. Related Links CLKCTRL - Clock Controller 11.2.2.2 I/O Lines and Connections Not applicable. 11.2.2.3 Interrupts Not applicable. 11.2.2.4 Events Not applicable. 11.2.2.5 Debug Operation When run-time debugging, this peripheral will continue normal operation. The SLPCTRL is only affected by a break in debug operation: If the SLPCTRL is in a sleep mode when a break occurs, the device will wake up and the SLPCTRL will go to active mode, even if there are no pending interrupt requests. If the peripheral is configured to require periodical service by the CPU through interrupts or similar, improper operation or data loss may result during halted debugging. 11.3 Functional Description 11.3.1 Initialization To put the device into a sleep mode, follow these steps: • Configure and enable the interrupts that should wake up the device from sleep. Also enable global interrupts. Warning: If there are no interrupts enabled when going to sleep, the device cannot wake up again. Only a reset will allow the device to continue operation. • Select the sleep mode to be entered and enable the Sleep Controller by writing to the Sleep Mode bits (SMODE) and the Enable bit (SEN) in the Control A register (SLPCTRL.CTRLA). A SLEEP instruction must be run to make the device actually go to sleep. ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 72 |
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