ATTINY817-MFR. datasheet(51/492 Pages) MICROCHIP

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Erase-Write Operation

The erase-write command is a combination of the erase and write command, but without clearing

the page buffer after the erase command: The erase-write operation first erases the selected page,

then it writes the content of the page buffer to the same page.

When executed on the Flash, the CPU will be halted when the operations are ongoing. When executed

on EEPROM, the CPU can continue executing code.

The page buffer will be automatically cleared after the operation is finished.

Page Buffer Clear Command

The page buffer clear command clears the page buffer. The contents of the page buffer will be all-

ones after the operation. The CPU will be halted when the operation executes (7 CPU cycles).

Chip Erase Command

The chip erase command erases the Flash and the EEPROM. The EEPROM is unaltered if the

EEPROM Save During Chip Erase (EESAVE) fuse in FUSE.SYSCFG0 is set. The memory will be all-

ones after the operation.

EEPROM Erase Command

The EEPROM erase command erases the EEPROM. The EEPROM will be all-ones after the operation.

The CPU will be halted while the EEPROM is being erased.

Fuse Write Command

The fuse write command writes the fuses. It can only be used by the UPDI, the CPU cannot start this

command.

Follow this procedure to use this command:

•

Write the address of the fuse to the Address register (NVMCTRL.ADDR)

•

Write the data to be written to the fuse to the Data register (NVMCTRL.DATA)

•

Execute the fuse write command.

•

After the fuse is written, a Reset is required for the updated value to take effect.

For reading fuses, use a regular read on the memory location.

9.3.3

Preventing Flash/EEPROM Corruption

During periods of low VDD, the Flash program or EEPROM data can be corrupted if the supply voltage is

too low for the CPU and the Flash/EEPROM to operate properly. These issues are the same as for board

level systems using Flash/EEPROM, and the same design solutions should be applied.

A Flash/EEPROM corruption can be caused by two situations when the voltage is too low: First, a regular

write sequence to the Flash requires a minimum voltage to operate correctly. Also, the CPU itself can

execute instructions incorrectly when the supply voltage is too low. See the Electrical Characteristics

chapter for Maximum Frequency vs. VDD.

Flash/EEPROM corruption can be avoided by these measures:

Keep the device in reset during periods of insufficient power supply voltage. This can be done by enabling

the internal Brown-Out Detector (BOD).

The voltage level monitor in the BOD can be used to prevent starting a write to the EEPROM close to the

BOD level.

If the detection levels of the internal BOD does not match the required detection level, an external low-

VDD-reset protection circuit can be used. If a Reset occurs while a write operation is ongoing, the write

operation will be aborted.

ATTINY817-MFR. Datasheet(PDF) 51 Page - Microchip Technology

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