ATTINY817-MFR. datasheet(84/492 Pages) MICROCHIP

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13.2.3.5 Debug Operation

When run-time debugging, this peripheral will continue normal operation. Halting the CPU in debugging

mode will halt normal operation of the peripheral.

If the peripheral is configured to require periodical service by the CPU through interrupts or similar,

improper operation or data loss may result during halted debugging.

Related Links

UPDI - Unified Program and Debug Interface

13.3

Functional Description

13.3.1

Initialization

An interrupt must be initialized in the following order:

Configure the CPUINT if the default configuration is not adequate (optional):

–

Vector handling is configured by writing to the respective bits (IVSEL and CVT) in the Control

A register (CPUINT.CTRLA).

–

Vector prioritizing by round-robin is enabled by writing a '1' to the Round-Robin Priority Enable

bit (LVL0RR) in CPUINT.CTRLA.

–

Select the priority level 1 vector by writing its address to the Interrupt Vector (LVL1VEC) in the

Level 1 Priority register (CPUINT.LVL1VEC).

Configure the interrupt conditions within the peripheral, and enable the peripheral's interrupt.

Enable interrupts globally by writing a '1' to the Global Interrupt Enable bit (I) in the CPU Status

13.3.2

Operation

13.3.2.1 Enabling, Disabling, and Resetting

Global enabling of interrupts is done by writing a '1' to the Global Interrupt Enable bit (I) in the CPU Status

The desired interrupt lines must also be enabled in the respective peripheral, by writing to the peripheral's

Interrupt Control register ([peripheral].INTCTRL).

Interrupt flags are not automatically cleared after the interrupt is executed. The respective INTFLAGS

13.3.2.2 Interrupt Vector Locations

The table below shows Reset addresses and Interrupt vector placement, dependent on the value of

Interrupt Vector Select bit (IVSEL) in the Control A register (CPUINT.CTRLA).

If the program never enables an interrupt source, the Interrupt Vectors are not used, and regular program

code can be placed at these locations.

Table 13-2. Reset and Interrupt Vector Placement

IVSEL

Reset address

Interrupt vectors start address

0x0000

Application start address +

Interrupt vector offset address

0x0000

Interrupt vector offset address

ATtiny417/817

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