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ATTINY817-MFR. Datasheet(PDF) 105 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 105 Page - Microchip Technology |
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105 / 492 page ![]() 15.2 Register Summary - PORTMUX Offset Name Bit Pos. 0x00 CTRLA 7:0 LUT1 LUT0 EVOUT2 EVOUT1 EVOUT0 0x01 CTRLB 7:0 TWI0 SPI0 USART0 0x02 CTRLC 7:0 TCA05 TCA04 TCA03 TCA02 TCA01 TCA00 0x03 CTRLD 7:0 TCB0 15.3 Register Description 15.3.1 Control A Name: CTRLA Offset: 0x00 Reset: 0x00 Property: - Bit 7 6 5 4 3 2 1 0 LUT1 LUT0 EVOUT2 EVOUT1 EVOUT0 Access R/W R/W R/W R/W R/W Reset 0 0 0 0 0 Bit 5 – LUT1: CCL LUT 1 output Write this bit to '1' to select alternative pin location for CCL LUT 1. Bit 4 – LUT0: CCL LUT 0 output Write this bit to '1' to select alternative pin location for CCL LUT 0. Bit 2 – EVOUT2: Event Output 2 Write this bit to '1' to enable event output 2. Bit 1 – EVOUT1: Event Output 1 Write this bit to '1' to enable event output 1. Bit 0 – EVOUT0: Event Output 0 Write this bit to '1' to enable event output 0. 15.3.2 Control B Name: CTRLB Offset: 0x01 Reset: 0x00 Property: - ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 105 |
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