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ATTINY817-MFR. Datasheet(PDF) 126 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 126 Page - Microchip Technology |
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126 / 492 page ![]() 17.4 Register Summary - BOD Offset Name Bit Pos. 0x00 CTRLA 7:0 SAMPFREQ ACTIVE[1:0] SLEEP[1:0] 0x01 CTRLB 7:0 LVL[2:0] 0x02 ... 0x07 Reserved 0x08 VLMCTRLA 7:0 VLMLVL[1:0] 0x09 INTCTRL 7:0 VLMCFG[1:0] VLMIE 0x0A INTFLAGS 7:0 VLMIF 0x0B STATUS 7:0 VLMS 17.5 Register Description 17.5.1 Control A Name: CTRLA Offset: 0x00 Reset: Loaded from fuse Property: Configuration Change Protection Bit 7 6 5 4 3 2 1 0 SAMPFREQ ACTIVE[1:0] SLEEP[1:0] Access R R R R R R R/W R/W Reset 0 0 0 x x x x x Bit 4 – SAMPFREQ: Sample Frequency This bit selects the BOD sample frequency. The Reset value is loaded from the SAMPFREQ bit in FUSE.BODCFG.This bit is under Configuration Change Protection (CCP). Value Description 0x0 Sample frequency is 1kHz 0x1 Sample frequency is 125Hz Bits 3:2 – ACTIVE[1:0]: Active These bits selects the BOD operation mode when the device is in active or idle mode. The Reset value is loaded from the ACTIVE bits in FUSE.BODCFG.These bits are not under Configuration Change Protection (CCP). Value Description 0x0 Disabled 0x1 Enabled 0x2 Sampled 0x3 Enabled with wake-up halted until BOD is ready ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 126 |
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