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PDP83TG720SWCSTQ1 Datasheet(PDF) 165 Page - Texas Instruments |
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PDP83TG720SWCSTQ1 Datasheet(HTML) 165 Page - Texas Instruments |
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165 / 199 page ![]() 7.6.2.107 TRAINING Register (Address = 0x1902) [reset = 0x2] TRAINING is shown in Table 7-130. Return to the Summary Table. Table 7-130. TRAINING Register Field Descriptions Bit Field Type Reset Description 15-11 RESERVED R 5b00000 Reserved 10-4 cfg_training_user_fld R/W 7b0000000 7-bit user defined field to send to the link partner Note - 0x1 added in [15:12] to differentiate 3-2 RESERVED R 2b00 Reserved 1 cfg_oam_en R/W 1b1 1 = 1000BASE-T1 OAM ability advertised to link partner 0 = 1000BASE-T1 OAM ability not advertised to link partner Note - 0x1 added in [15:12] to differentiate 1b0 = 1000BASE-T1 OAM ability not advertised to link partner 1b1 = 1000BASE-T1 OAM ability advertised to link partner 0 cfg_eee_en R/W 1b0 1 = EEE ability advertised to link partner 0 = EEE ability not advertised to link partner Note - 0x1 added in [15:12] to differentiate 1b0 = EEE ability not advertised to link partner 1b1 = EEE ability advertised to link partner www.ti.com DP83TG720S-Q1 SNLS604 – SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 165 |
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