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PDP83TG720SWCSTQ1 Datasheet(PDF) 166 Page - Texas Instruments |
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PDP83TG720SWCSTQ1 Datasheet(HTML) 166 Page - Texas Instruments |
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166 / 199 page ![]() 7.6.2.108 LP_TRAINING Register (Address = 0x1903) [reset = 0x0] LP_TRAINING is shown in Table 7-131. Return to the Summary Table. Table 7-131. LP_TRAINING Register Field Descriptions Bit Field Type Reset Description 15-11 RESERVED R 5b00000 Reserved 10-4 lp_training_user_fld R 7b0000000 7-bit user defined field received from the link partner Note - 0x1 added in [15:12] to differentiate 3-2 RESERVED R 2b00 Reserved 1 lp_oam_adv R 1b0 1 = Link partner has 1000BASE-T1 OAM ability 0 = Link partner does not have 1000BASE-T1 OAM ability Note - 0x1 added in [15:12] to differentiate 1b0 = Link partner does not have 1000BASE-T1 OAM ability 1b1 = Link partner has 1000BASE-T1 OAM ability 0 lp_eee_adv R 1b0 1 = Link partner has EEE ability 0 = Link partner does not have EEE ability Note - 0x1 added in [15:12] to differentiate 1b0 = Link partner does not have EEE ability 1b1 = Link partner has EEE ability DP83TG720S-Q1 SNLS604 – SEPTEMBER 2020 www.ti.com 166 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated |
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