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LSM6DSV320X Datasheet(PDF) 141 Page - STMicroelectronics |
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LSM6DSV320X Datasheet(HTML) 141 Page - STMicroelectronics |
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141 / 212 page ![]() 13.23 SFLP_QUATW_L (2Ah) and SFLP_QUATW_H (2Bh) SFLP game rotation vector W value output register (R). The value is expressed as half-precision floating-point format: SEEEEEFFFFFFFFFF (S: 1 sign bit; E: 5 exponent bits; F: 10 fraction bits). Table 321. SFLP_QUATW_H and SFLP_QUATW_L registers D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Table 322. SFLP_QUATW_H and SFLP_QUATW_L register description D[15:0] SFLP game rotation vector W value output value 13.24 SFLP_QUATX_L (2Ch) and SFLP_QUATX_H (2Dh) SFLP game rotation vector X value output register (R). The value is expressed as half-precision floating-point format: SEEEEEFFFFFFFFFF (S: 1 sign bit; E: 5 exponent bits; F: 10 fraction bits). Table 323. SFLP_QUATX_H and SFLP_QUATX_L registers D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Table 324. SFLP_QUATX_H and SFLP_QUATX_L register description D[15:0] SFLP game rotation vector X value output value 13.25 SFLP_QUATY_L (2Eh) and SFLP_QUATY_H (2Fh) SFLP game rotation vector Y value output register (R). The value is expressed as half-precision floating-point format: SEEEEEFFFFFFFFFF (S: 1 sign bit; E: 5 exponent bits; F: 10 fraction bits). Table 325. SFLP_QUATY_H and SFLP_QUATY_L registers D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Table 326. SFLP_QUATY_H and SFLP_QUATY_L register description D[15:0] SFLP game rotation vector Y value output value LSM6DSV320X Embedded functions register description DS14623 - Rev 1 page 141/212 |
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