R7FA2L1AB2DFM datasheet(78/114 Pages) RENESAS

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Note:

The frequency accuracy of ICLK must be ± 1.0% during programming or erasing the flash memory. Confirm the frequency accuracy

of the clock source.

Note 1. Total time of four commands.

Table 2.55

Code flash characteristics (3)

Middle-speed operating mode

Conditions: VCC = AVCC0 = 1.6 to 5.5 V

Parameter

Symbol

ICLK = 1 MHz

ICLK = 8 MHz*2

Unit

Min

Typ

Max

Min

Typ

Max

Programming time

4-byte

tP4

—

732

—

356

µs

Erasure time

2-KB

tE2K

—

12.5

355

—

6.2

227

Blank check time

4-byte

tBC4

—

46.5

—

11.3

µs

2-KB

tBC2K

—

3681

—

534

µs

Erase suspended time

tSED

—

22.3

—

11.7

µs

Access window information program

Start-up area selection and security

setting time

tAWSSAS —

21.2

570

—

12.2

435

OCD/serial programmer ID setting

time*1

tOSIS

—

84.7

2280

—

48.7

1740

Flash memory mode transition wait

time 1

tDIS

—

µs

Flash memory mode transition wait

time 2

tMS

—

µs

Note:

Does not include the time until each operation of the flash memory is started after instructions are executed by software.

Note:

The lower-limit frequency of ICLK is 1 MHz during programming or erasing the flash memory. When using ICLK at below 4 MHz, the

frequency can be set to 1 MHz, 2 MHz, or 3 MHz. A non-integer frequency such as 1.5 MHz cannot be set.

Note:

The frequency accuracy of ICLK must be ± 1.0% during programming or erasing the flash memory. Confirm the frequency accuracy

of the clock source.

Note 1. Total time of four commands.

Note 2. When 1.8 V ≤ VCC = AVCC0 ≤ 5.5 V

Table 2.56

Code flash characteristics (4)

Low-speed operating mode

Conditions: VCC = AVCC0 = 1.6 to 5.5 V

Parameter

Symbol

ICLK = 1 MHz

ICLK = 2 MHz

Unit

Min

Typ

Max

Min

Typ

Max

Programming time

4-byte

tP4

—

732

—

502

µs

Erasure time

2-KB

tE2K

—

12.5

355

—

8.8

280

Blank check time

4-byte

tBC4

—

46.5

—

23.3

µs

2-KB

tBC2K

—

3681

—

1841

µs

Erase suspended time

tSED

—

22.3

—

16.2

µs

Access window information program

Start-up area selection and security

setting time

tAWSSAS —

21.2

570

—

15.9

491

OCD/serial programmer ID setting

time*1

tOSIS

—

84.7

2280

—

63.5

1964

Flash memory mode transition wait

time 1

tDIS

—

µs

Flash memory mode transition wait

time 2

tMS

—

µs

Note:

Does not include the time until each operation of the flash memory is started after instructions are executed by software.

Note:

The lower-limit frequency of ICLK is 1 MHz during programming or erasing the flash memory. When using ICLK at below 4 MHz, the

frequency can be set to 1 MHz or 2 MHz. A non-integer frequency such as 1.5 MHz cannot be set.

Note:

The frequency accuracy of ICLK must be ± 1.0% during programming or erasing the flash memory. Confirm the frequency accuracy

of the clock source.

RA2L1 Datasheet

2. Electrical Characteristics

R01DS0385EJ0160 Rev.1.60

Oct 14, 2025

Page 78 of 114

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