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MYX29GL01GS11DPIV2 Datasheet(PDF) 50 Page - Micross Components |
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MYX29GL01GS11DPIV2 Datasheet(HTML) 50 Page - Micross Components |
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50 / 68 page ![]() MYX29GL01GS11DPIV2 Revision 1.0 - 01/26/2015 *Advanced information. Subject to change without notice. 50 1Gb GL-S MirrorBit® Eclipse™ Flash Memory MYX29GL01GS11DPIV2* Form #: CSI-D-685 Document 001 9 .5 Capacitance Characteristics Table 19: Connector Capacitance for FBGA (LAE) Package Parameter Symbol Parameter Description Test Setup Typ Max Unit CIN Input Capacitance VIN = 0 7 8 pF COUT Output Capacitance VOUT = 0 5 6 pF CIN2 Control Pin Capacitance VIN = 0 3 7 pF RY/BY# Output Capacitance VOUT = 0 3 4 pF Notes: 1.Sampled,not100%tested. 2.TestconditionsTA=25°C,f=1.0MHz. 10 Timing Specifications 10 .1 AC Test Conditions Figure 7: Test Setup October 9, 2013 S29GL_128S_01GS_00_08 GL-S MirrorBit® Family 77 Data She e t 10. Timing Specifications 10.1 Key to Switching Waveforms 10.2 AC Test Conditions Figure 10.1 Test Setup Note: 1. Measured between VIL max and VIH min. Figure 10.2 Input Waveforms and Measurement Levels Waveform Inputs Outputs Steady Changing from H to L Changing from L to H Don't Care, Any Change Permitted Changing, State Unknown Does Not Apply Center Line is High Impedance State (High-Z) Table 10.1 Test Specification Parameter All Speeds Units Output Load Capacitance, CL 30 pF Input Rise and Fall Times (Note 1) 1.5 ns Input Pulse Levels 0.0-VIO V Input timing measurement reference levels VIO/2 V Output timing measurement reference levels VIO/2 V CL Device Under Test VIO 0.0 V 0.5 VIO 0.5 VIO Output Measurement Level Input |
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