MC68HC908AP16CFB datasheet(142/440 Pages) MOTOROLA

142 / 440 page

System Integration Module (SIM)

Data Sheet

MC68HC908AP Family — Rev. 2.5

142

MOTOROLA

9.5.1.2 SWI Instruction

The SWI instruction is a non-maskable instruction that causes an

interrupt regardless of the state of the interrupt mask (I bit) in the

condition code register.

NOTE:

A software interrupt pushes PC onto the stack. A software interrupt does

not push PC – 1, as a hardware interrupt does.

9.5.1.3 Interrupt Status Registers

The flags in the interrupt status registers identify maskable interrupt

sources. Table 9-3 summarizes the interrupt sources and the interrupt

status register flags that they set. The interrupt status registers can be

useful for debugging.

9.5.1.4 Interrupt Status Register 1

IF6–IF1 — Interrupt Flags 6–1

These flags indicate the presence of interrupt requests from the

sources shown in Table 9-3.

1 = Interrupt request present

0 = No interrupt request present

Bit 0 and Bit 1 — Always read 0

Address:

$FE04

Bit 7

654321

Bit 0

Read:

IF6

IF5

IF4

IF3

IF2

IF1

Write:

RRRRRRRR

Reset:

00000000

R= Reserved

Figure 9-12. Interrupt Status Register 1 (INT1)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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