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MC68HC908AP16CFB Datasheet(PDF) 138 Page - Motorola, Inc |
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MC68HC908AP16CFB Datasheet(HTML) 138 Page - Motorola, Inc |
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138 / 440 page ![]() System Integration Module (SIM) Data Sheet MC68HC908AP Family — Rev. 2.5 138 MOTOROLA 9.4 SIM Counter The SIM counter is used by the power-on reset module (POR) and in stop mode recovery to allow the oscillator time to stabilize before enabling the internal bus (IBUS) clocks. The SIM counter also serves as a prescaler for the computer operating properly module (COP). The SIM counter overflow supplies the clock for the COP module. The SIM counter is 13 bits long and is clocked by the falling edge of CGMXCLK. 9.4.1 SIM Counter During Power-On Reset The power-on reset module (POR) detects power applied to the MCU. At power-on, the POR circuit asserts the signal PORRST. Once the SIM is initialized, it enables the clock generation module (CGM) to drive the bus clock state machine. 9.4.2 SIM Counter During Stop Mode Recovery The SIM counter also is used for stop mode recovery. The STOP instruction clears the SIM counter. After an interrupt, break, or reset, the SIM senses the state of the short stop recovery bit, SSREC, in the mask option register. If the SSREC bit is a logic 1, then the stop recovery is reduced from the normal delay of 4096 CGMXCLK cycles down to 32 CGMXCLK cycles. This is ideal for applications using canned oscillators that do not require long start-up times from stop mode. External crystal applications should use the full stop recovery time, that is, with SSREC cleared. 9.4.3 SIM Counter and Reset States External reset has no effect on the SIM counter. (See 9.6.2 Stop Mode for details.) The SIM counter is free-running after all reset states. (See 9.3.2 Active Resets from Internal Sources for counter control and internal reset recovery sequences.) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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