MC68HC908AP16CFB datasheet(134/440 Pages) MOTOROLA

134 / 440 page

System Integration Module (SIM)

Data Sheet

MC68HC908AP Family — Rev. 2.5

134

MOTOROLA

9.3.1 External Pin Reset

The RST pin circuit includes an internal pull-up device. Pulling the

asynchronous RST pin low halts all processing. The PIN bit of the SIM

reset status register (SRSR) is set as long as RST is held low for a

minimum of 67 ICLK cycles, assuming that neither the POR nor the LVI

was the source of the reset. See Table 9-2 for details.

Figure 9-4 shows the relative timing.

Figure 9-4. External Reset Timing

9.3.2 Active Resets from Internal Sources

All internal reset sources actively pull the RST pin low for 32 ICLK cycles

to allow resetting of external peripherals. The internal reset signal IRST

continues to be asserted for an additional 32 cycles (see Figure 9-5). An

internal reset can be caused by an illegal address, illegal opcode, COP

timeout, LVI, or POR (see Figure 9-6).

NOTE:

For LVI or POR resets, the SIM cycles through 4096 + 32 ICLK cycles

during which the SIM forces the RST pin low. The internal reset signal

then follows the sequence from the falling edge of RST shown in

Figure 9-5.

Table 9-2. PIN Bit Set Timing

Reset Type

Number of Cycles Required to Set PIN

POR/LVI

4163 (4096 + 64 + 3)

All others

67 (64 + 3)

RST

IAB

VECT H

VECT L

ICLK

Freescale Semiconductor, Inc.

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MC68HC908AP16CFB Datasheet(PDF) 134 Page - Motorola, Inc