MC68HC908AP16CFB datasheet(274/440 Pages) MOTOROLA

274 / 440 page

Infrared Serial Communications

Data Sheet

MC68HC908AP Family — Rev. 2.5

274

MOTOROLA

PTY — Parity Bit

This read/write bit determines whether the SCI generates and checks

for odd parity or even parity. (See Table 14-6.) Reset clears the PTY

bit.

1 = Odd parity

0 = Even parity

NOTE:

Changing the PTY bit in the middle of a transmission or reception can

generate a parity error.

14.10.2 IRSCI Control Register 2

IRSCI control register 2:

•

Enables the following CPU interrupt requests:

–

Enables the SCTE bit to generate transmitter CPU interrupt

requests

–

Enables the TC bit to generate transmitter CPU interrupt

requests

–

Enables the SCRF bit to generate receiver CPU interrupt

requests

–

Enables the IDLE bit to generate receiver CPU interrupt

requests

•

Enables the transmitter

•

Enables the receiver

•

Enables SCI wakeup

•

Transmits SCI break characters

Table 14-6. Character Format Selection

Control Bits

Character Format

PEN:PTY

Start

Bits

Data

Bits

Parity

Stop

Bits

Character

Length

None

10 bits

None

11 bits

Even

10 bits

Odd

10 bits

Even

11 bits

Odd

11 bits

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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