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ATTINY817-MFR. Datasheet(PDF) 145 Page - Microchip Technology |
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ATTINY817-MFR. Datasheet(HTML) 145 Page - Microchip Technology |
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145 / 492 page  Figure 20-3. Timer/Counter Clock Logic CKSEL CNTEI CLK_PER event Event System Prescaler CNT (Encoding) EVACT CLK_TCA 20.2.2 Signal Description Signal Description Type WO[2:0] Digital output Waveform output WO[5:3] Digital output Waveform output - Split Mode only 20.2.3 System Dependencies In order to use this peripheral, other parts of the system must be configured correctly, as described below. Table 20-1. TCA System Dependencies Dependency Applicable Peripheral Clocks Yes CLKCTRL I/O Lines and Connections Yes WO[5:0] Interrupts Yes CPUINT Events Yes EVSYS Debug Yes UPDI Related Links Clocks Debug Operation Interrupts Events 20.2.3.1 Clocks This peripheral uses the system clock CLK_PER, and has its own prescaler. Related Links CLKCTRL - Clock Controller 20.2.3.2 I/O Lines and Connections Using the I/O lines of the peripheral requires configuration of the I/O pins. ATtiny417/817 © 2017 Microchip Technology Inc. Datasheet Complete DS40001901B-page 145 |
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